A forward/reverse body bias generator (BBG) which operates under wide supply-range is proposed. Fine-grained body biasing (FGBB) is effective to reduce variability and increase energy efficiency on digital LSIs. Since FGBB requires a number of BBGs to be implemented, simple design is preferred. We propose a BBG with charge pumps for reverse body bias and the BBG operates under wide supply-range from 0.5 V to 1.2 V. Layout of the BBG was designed in a cell-based flow with an AES core and fabricated in a 65 nm CMOS process. Area of the AES core is 0.22 mm2 and area overhead of the BBG is 2.3%. Demonstration of the AES core shows a successful operation with the supply voltage from 0.5 V to 1.2 V which enables the reduction of power dissipation, for example, of 17% at 400 MHz operation.
Norihiro KAMAE
Kyoto University
Akira TSUCHIYA
Kyoto University
Hidetoshi ONODERA
Kyoto University
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Norihiro KAMAE, Akira TSUCHIYA, Hidetoshi ONODERA, "A Forward/Reverse Body Bias Generator with Wide Supply-Range down to Threshold Voltage" in IEICE TRANSACTIONS on Electronics,
vol. E98-C, no. 6, pp. 504-511, June 2015, doi: 10.1587/transele.E98.C.504.
Abstract: A forward/reverse body bias generator (BBG) which operates under wide supply-range is proposed. Fine-grained body biasing (FGBB) is effective to reduce variability and increase energy efficiency on digital LSIs. Since FGBB requires a number of BBGs to be implemented, simple design is preferred. We propose a BBG with charge pumps for reverse body bias and the BBG operates under wide supply-range from 0.5 V to 1.2 V. Layout of the BBG was designed in a cell-based flow with an AES core and fabricated in a 65 nm CMOS process. Area of the AES core is 0.22 mm2 and area overhead of the BBG is 2.3%. Demonstration of the AES core shows a successful operation with the supply voltage from 0.5 V to 1.2 V which enables the reduction of power dissipation, for example, of 17% at 400 MHz operation.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/transele.E98.C.504/_p
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@ARTICLE{e98-c_6_504,
author={Norihiro KAMAE, Akira TSUCHIYA, Hidetoshi ONODERA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Forward/Reverse Body Bias Generator with Wide Supply-Range down to Threshold Voltage},
year={2015},
volume={E98-C},
number={6},
pages={504-511},
abstract={A forward/reverse body bias generator (BBG) which operates under wide supply-range is proposed. Fine-grained body biasing (FGBB) is effective to reduce variability and increase energy efficiency on digital LSIs. Since FGBB requires a number of BBGs to be implemented, simple design is preferred. We propose a BBG with charge pumps for reverse body bias and the BBG operates under wide supply-range from 0.5 V to 1.2 V. Layout of the BBG was designed in a cell-based flow with an AES core and fabricated in a 65 nm CMOS process. Area of the AES core is 0.22 mm2 and area overhead of the BBG is 2.3%. Demonstration of the AES core shows a successful operation with the supply voltage from 0.5 V to 1.2 V which enables the reduction of power dissipation, for example, of 17% at 400 MHz operation.},
keywords={},
doi={10.1587/transele.E98.C.504},
ISSN={1745-1353},
month={June},}
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TY - JOUR
TI - A Forward/Reverse Body Bias Generator with Wide Supply-Range down to Threshold Voltage
T2 - IEICE TRANSACTIONS on Electronics
SP - 504
EP - 511
AU - Norihiro KAMAE
AU - Akira TSUCHIYA
AU - Hidetoshi ONODERA
PY - 2015
DO - 10.1587/transele.E98.C.504
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E98-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2015
AB - A forward/reverse body bias generator (BBG) which operates under wide supply-range is proposed. Fine-grained body biasing (FGBB) is effective to reduce variability and increase energy efficiency on digital LSIs. Since FGBB requires a number of BBGs to be implemented, simple design is preferred. We propose a BBG with charge pumps for reverse body bias and the BBG operates under wide supply-range from 0.5 V to 1.2 V. Layout of the BBG was designed in a cell-based flow with an AES core and fabricated in a 65 nm CMOS process. Area of the AES core is 0.22 mm2 and area overhead of the BBG is 2.3%. Demonstration of the AES core shows a successful operation with the supply voltage from 0.5 V to 1.2 V which enables the reduction of power dissipation, for example, of 17% at 400 MHz operation.
ER -