Bit Length Optimization of Fractional Part on Floating to Fixed Point Conversion for High-Level Synthesis

Nobuhiro DOI; Takashi HORIYAMA; Masaki NAKANISHI; Shinji KIMURA; Katsumasa WATANABE

Bit Length Optimization of Fractional Part on Floating to Fixed Point Conversion for High-Level Synthesis

Nobuhiro DOI, Takashi HORIYAMA, Masaki NAKANISHI, Shinji KIMURA, Katsumasa WATANABE

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In the hardware synthesis from a high-level language such as C, the bit length of variables is one of the key issues for the area and speed optimization. Usually, designers are required to optimize the bit-length of each variable manually using the time-consuming simulation on huge-data. In this paper, we propose an optimization method of the fractional bit length in the conversion from floating-point variables to fixed-point variables. The method is based on error propagation and the backward propagation of the accuracy limitation. The method is fully analytical and fast compared to simulation based methods.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E86-A No.12 pp.3184-3191

Publication Date: 2003/12/01

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Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)

Category: Logic and High Level Synthesis

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Nobuhiro DOI, Takashi HORIYAMA, Masaki NAKANISHI, Shinji KIMURA, Katsumasa WATANABE, "Bit Length Optimization of Fractional Part on Floating to Fixed Point Conversion for High-Level Synthesis" in IEICE TRANSACTIONS on Fundamentals, vol. E86-A, no. 12, pp. 3184-3191, December 2003, doi: .
Abstract: In the hardware synthesis from a high-level language such as C, the bit length of variables is one of the key issues for the area and speed optimization. Usually, designers are required to optimize the bit-length of each variable manually using the time-consuming simulation on huge-data. In this paper, we propose an optimization method of the fractional bit length in the conversion from floating-point variables to fixed-point variables. The method is based on error propagation and the backward propagation of the accuracy limitation. The method is fully analytical and fast compared to simulation based methods.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1587/e86-a_12_3184/_p

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@ARTICLE{e86-a_12_3184,
author={Nobuhiro DOI, Takashi HORIYAMA, Masaki NAKANISHI, Shinji KIMURA, Katsumasa WATANABE, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Bit Length Optimization of Fractional Part on Floating to Fixed Point Conversion for High-Level Synthesis},
year={2003},
volume={E86-A},
number={12},
pages={3184-3191},
abstract={In the hardware synthesis from a high-level language such as C, the bit length of variables is one of the key issues for the area and speed optimization. Usually, designers are required to optimize the bit-length of each variable manually using the time-consuming simulation on huge-data. In this paper, we propose an optimization method of the fractional bit length in the conversion from floating-point variables to fixed-point variables. The method is based on error propagation and the backward propagation of the accuracy limitation. The method is fully analytical and fast compared to simulation based methods.},
keywords={},
doi={},
ISSN={},
month={December},}

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TY - JOUR
TI - Bit Length Optimization of Fractional Part on Floating to Fixed Point Conversion for High-Level Synthesis
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3184
EP - 3191
AU - Nobuhiro DOI
AU - Takashi HORIYAMA
AU - Masaki NAKANISHI
AU - Shinji KIMURA
AU - Katsumasa WATANABE
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E86-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2003
AB - In the hardware synthesis from a high-level language such as C, the bit length of variables is one of the key issues for the area and speed optimization. Usually, designers are required to optimize the bit-length of each variable manually using the time-consuming simulation on huge-data. In this paper, we propose an optimization method of the fractional bit length in the conversion from floating-point variables to fixed-point variables. The method is based on error propagation and the backward propagation of the accuracy limitation. The method is fully analytical and fast compared to simulation based methods.
ER -