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[Author] Kenichi MAEDA(4hit)

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  • An Even Harmonic Quadrature Mixer with a Simple Filter Configuration and an Integrated LTCC Module for W-CDMA Direct Conversion Receiver

    Mitsuhiro SHIMOZAWA  Kenichi MAEDA  Eiji TANIGUCHI  Keiichi SADAHIRO  Takayuki IKUSHIMA  Tamotsu NISHINO  Noriharu SUEMATSU  Kenji ITOH  Yoji ISOTA  Tadashi TAKAGI  

     
    PAPER

      Vol:
    E89-C No:4
      Page(s):
    473-481

    This paper presents an even harmonic quadrature mixer (EH-QMIX) with a simple filter configuration and an integrated LTCC module including LNAs, band rejection filters (BRFs), and the proposed EH-QMIX for W-CDMA direct conversion receiver (DCR). Since the DCR has no spurious responses, a BRF instead of a high-Q band pass filter can be applicable for eliminating undesired signals and it can be built in the LTCC substrates easily. As LO frequency is half of RF frequency in the EH-QMIX, diplexer can be composed of simple filters and it can be also integrated in the substrates. As a result, the whole RF circuits of the EH-DCR using a proposed EH-QMIX are integrated in the LTCC module and miniaturization of the receiver is achieved. Moreover, in order to suppress the degradation of the amplitude and the phase imbalances in the quadrature mixer caused by interferences of signals, RF characteristics of the circuits in the mixer such as reflection coefficients, isolations are discussed. A developed LTCC module shows good performances for W-CDMA direct conversion receiver.

  • A 2 GHz-Band Even Harmonic Type SiGe-MMIC Direct Conversion CECCTP Mixer

    Eiji TANIGUCHI  Kenichi MAEDA  Chiemi SAWAUMI  Noriharu SUEMATSU  

     
    PAPER

      Vol:
    E85-C No:7
      Page(s):
    1412-1418

    A novel common emitter common collector transistor pair (CECCTP) mixer is presented. A LO pumped CECCTP enables even harmonic mixing operation, and a balanced CECCTP mixer configuration enables the suppression of both 2fLO and fIM2 which are undesirable component for direct conversion mixer. A 2 GHz-band balanced CECCTP mixer is fabricated in SiGe HBT process, and the direct conversion characteristics are measured. It performs conversion gain of 8.8 dB, NF of 14.9 dB and IIP2 of 42.3 dBm when LO power is -6 dBm, supplied voltage is 3 V and current is 5 mA.

  • 0.8-/1.5-GHz-Band WCDMA HBT MMIC Power Amplifiers with an Analog Bias Control Scheme

    Kazuya YAMAMOTO  Takayuki MATSUZUKA  Miyo MIYASHITA  Kenichi MAEDA  Satoshi SUZUKI  Hiroaki SEKI  

     
    PAPER-Microwaves, Millimeter-Waves

      Vol:
    E98-C No:9
      Page(s):
    934-945

    This paper describes 0.8-/1.5-GHz-band GaAs-HBT power amplifier modules with a newly designed analog bias control scheme. This scheme has two features. One is to achieve approximately linear quiescent current control using not a BiFET process but only the usual HBT process. The other is to help improve linearity under reduced supply voltage and lower quiescent current operation. The following two key techniques are incorporated into the bias scheme. The first is to employ two different kinds of bias circuits: emitter follower bias and current injection bias. The second is the unique current injection bias block, based on the successful combination of an input buffer with an emitter resistance load and a current mirror. These techniques allow quiescent current control that is almost proportional to an externally applied analog control voltage. To confirm the effectiveness of the scheme, 0.8-GHz-band and 1.5-GHz-band power amplifier modules were designed and fabricated using the usual HBT process. Measurements conducted under the conditions of a 3.4V supply voltage and an HSDPA WCDMA modulated signal are as follows. The 0.8-GHz-band amplifier can deliver a 28-dBm output power (Pout), a 28.4-dB power gain (Gp), and 42% PAE while restricting the ACLR to less than -40dBc. For the 1.5-GHz-band amplifier, 28dBm of Pout, 29dB of Gp, and 41% of PAE are obtained with the same ACLR levels. The measurements also confirm that the quiescent current for the second stage in the amplifiers is approximately linearly changed from 14mA to 58mA over a control voltage ranging from 1.1V to 2.2V. In addition, our measured DG.09-based current dissipation with both supply voltage and analog bias controls is as low as 16.9mA, showing that the analog bias control scheme enables an average current reduction of more than 20%, as compared to a conventional supply voltage and two-step quiescent current control.

  • An Even Harmonic Mixer Using Self-Biased Anti-Parallel Diode Pair

    Mitsuhiro SHIMOZAWA  Takatoshi KATSURA  Kenichi MAEDA  Eiji TANIGUCHI  Takayuki IKUSHIMA  Noriharu SUEMATSU  Kenji ITOH  Yoji ISOTA  Tadashi TAKAGI  

     
    PAPER

      Vol:
    E86-C No:8
      Page(s):
    1464-1471

    This paper presents an even harmonic mixer using self-biased anti-parallel diode pair (APDP). A proposed self-biased APDP is composed of a pair of diodes and self-bias series resistors. At high LO injection level, rectified current is generated by the diodes and reverse voltage is applied to the diodes by the self-bias resistor. Therefore, rapid degradation of conversion loss at high LO input level can be avoided. The effect of self-bias resistor is explained by using simplified behavior model and harmonic balance method, and is evaluated by the measurements of an L-band even harmonic type direct conversion mixer.

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