Hansen, Kaplan, Zamir and Zwick (STOC 2019) introduced a systematic way to use “bias” for predicting an assignment to a Boolean variable in the process of PPSZ and showed that their biased PPSZ algorithm achieves a relatively large success probability improvement of PPSZ for Unique 3SAT. We propose an additional way to use “bias” and show by numerical analysis that the improvement gets increased further.

A four-stage power amplifier (PA) with 10 GHz 1-dB bandwidth (56–66 GHz) is presented. The broadband performance is achieved owing to π-section interstage matching network. Three-stage-current-reuse topology is proposed to enhance efficiency. The amplifier has been fabricated in 65 nm digital CMOS. 18 dB power gain and 9.6 dBm saturated power (Psat) are achieved at 60 GHz. The PA consumes current of 50 mA at 1.2 V supply voltage, and has a peak power-added efficiency (PAE) of 13.6%. To the best of the authors' knowledge, this work shows the highest PAE among the reported CMOS PAs that covers the worldwide 9 GHz ISM millimeter-wave band with less-than-1.2 V supply voltage.

A fully differential direct conversion receiver IC for W-CDMA is presented. The receiver IC consists of an LNA, a quadrature demodulator, low-pass filters (LPFs), and variable gain amplifiers (VGAs). In order to suppress DC offset, which is the most important issue in a direct conversion system, an active harmonic mixer is applied to the quadrature demodulator. Furthermore, a receiving system, including the LNA and an RF filter, adopts a differential architecture to reduce local signal leakage, which generates DC offset. Performance of the entire receiving system was evaluated and DC offset in steady state was measured at only 40 mV. Moreover, DC offset variation at the LNA gain change, which has the largest affect on the receiving performance, was limited to 70 mV, which is less than -10 dB compared to desired signal strength. It was confirmed by computer simulation that the DC offset variation at the LNA gain change did not degrade bit error rate (BER) performance at all.

Topographical changes induced by optical near-field around photo-irradiated nanoparticles were attained using a pulsed laser with a large peak power as a light source. The arrayed structure of nanoparticles was transcribed on urethane-urea azo copolymer film as dent structure. The experiments by the pulsed laser of different wavelength showed that the topographical change was caused by the light absorption. The dent diameter and the dent depth changed depending on the diameter of nanoparticles.

This paper discusses a method of designing linear phase two-channel filter banks for integer wavelet transform. We show that the designed filter banks are easily structed as the lifting form by leading relationship between designed filters and lifting structure. The designed integer wavelets are applied to image compression to verify the efficiency of our method.

In this paper, we propose a function that provides scalability of image quality on the basis of regions of interest for JPEG2000 coding. Functions of this type are useful in the progressive transmission of images, where the aim is to more quickly decode regions of interest than backgrounds. The conventional methods of progressive transmission have mainly been based on SNR scalability or on resolution scalability. With these conventional functions, it is impossible to achieve region-based scalability in the progressive transmission of images. The proposed methods use the ROI and SNR layer structures of JPEG2000, so the methods are suitable for the region-progressive transmission of JPEG2000 images.

We investigate the relationship between two different notions of reducibility among prediction (learning) problems within the distribution-free learning model of Valiant (PAC learning model). The notions of reducibility we consider are the analogues for prediction problems of the many-one reducibility and of the Turing reducibility. The former is the notion of prediction preserving reducibility developed by Pitt and Warmuth, and its generalization. Concerning these two notions of reducibility, we show that there exist a pair of prediction problems A and B, whose membership problems are polynomial time solvable, such that A is reducible to B with respect to the Turing reducibility, but not with respect to the prediction preserving reducibility. We show this result by making use of the notion of a class of polynomially sparse variants of a concept representation class. We first show that any class A of polynomially sparse variants of another class B is reducible to B with respect to the Turing reducibility'. We then prove the existence of a prediction problem R and a class R of polynomially sparse variants of R, such that R does not reduce to R with respect to the prediction preserving reducibility.

We propose an efficient two-layer near-lossless coding method using an extended histogram packing technique with backward compatibility to the legacy JPEG standard. The JPEG XT, which is the international standard to compress HDR images, adopts a two-layer coding method for backward compatibility to the legacy JPEG standard. However, there are two problems with this two-layer coding method. One is that it does not exhibit better near-lossless performance than other methods for HDR image compression with single-layer structure. The other problem is that the determining the appropriate values of the coding parameters may be required for each input image to achieve good compression performance of near-lossless compression with the two-layer coding method of the JPEG XT. To solve these problems, we focus on a histogram-packing technique that takes into account the histogram sparseness of HDR images. We used zero-skip quantization, which is an extension of the histogram-packing technique proposed for lossless coding, for implementing the proposed near-lossless coding method. The experimental results indicate that the proposed method exhibits not only a better near-lossless compression performance than that of the two-layer coding method of the JPEG XT, but also there are no issue regarding the combination of parameter values without losing backward compatibility to the JPEG standard.

A quadrature demodulator (QDEMOD) for WCDMA direct-conversion receiver using a common-base input stage is reported. A common-base input stage is robust to parasitic elements and is suitable for integrating on-chip matching circuits to realize small and low-cost RF front-end modules. However, a common-mode blocker signal, such as the transmitter (TX) leakage signal, degrades the noise performance due to DC current increase and intermodulation distortion of the TX leakage signal and noise. We propose a QDEMOD with a common-base input stage capable of suppressing the TX leakage signal using symmetrical inductors. The QDEMOD was fabricated using SiGe BiCMOS process with fT of 75 GHz. The measured results show that the NF degradation does not occur until the TX leakage signal input is larger than -10 dBm.

We study nn random symmetric matrices whose entries above the diagonal are iid random variables each of which takes 1 with probability p and 0 with probability 1-p, for a given density parameter p=α/n for sufficiently large α. For a given such matrix A, we consider a matrix A ' that is obtained by removing some rows and corresponding columns with too many value 1 entries. Then for this A', we show that the largest eigenvalue is asymptotically close to α+1 and its eigenvector is almost parallel to all one vector (1,...,1).

Simple and scalable device-modeling techniques for inductors and capacitors are described. All model parameters are calculated from geometric parameters of the device, process parameters of the technology, and a substrate resistance parameter. Modeling techniques for other devices, such as resistors, varactor diodes, pads and MOSFETs, are also described. Some simulation results using the proposed device-modeling techniques are compared with measured results and they indicate adequacy of the proposed device-modeling techniques.

A 2-GHz down-converter for wide-band wireless communication systems is described. To achieve both wide-band output characteristic and LO signal suppression, an on-chip LC series resonator which is resonated at LO signal frequency and a transimpedance amplifier which is used in the output buffer circuit are used. To achieve a low sensitivity to temperature, two kinds of bias circuits; a VT reference current source and a bandgap reference current source are used. The measured 3-dB bandwidth of 600 MHz is achieved. The conversion gain varies less than 0.2 dB within 200 MHz 10 MHz and 400 MHz 10 MHz band and 0.7 dB for the temperature range from -34 to 85. At room temperature, conversion gain of 15 dB, NF of 9.5 dB and IIP3 of -5 dBm are obtained respectively. The down-converter is fabricated using Si BiCMOS process with ft=20 GHz, and it occupies approximately 1 mm2.

A linear-in-dB VGA of the current-divider type is fabricated in 0.25 µm CMOS technology. Two gain compensation techniques are proposed in order to compensate the gain deviations due to a MOSFET which has a square-law characteristic or an exponential-law characteristic determined by its current density. Temperature compensation techniques are also proposed. Measure results obtained at 380 MHz are a gain range of 80 dB, a gain error of 3 dB, and an NF of 11 dB.

Miller [9] proposed a linear-time algorithm for computing small separators for 2-connected planar graphs. We explain his algorithm and present a way to modify it to a space efficient version. Our algorithm can be regarded as a log-space reduction from the separator construction to the breadth first search tree construction.

We explain three random sampling techniques that are simple but widely applicable for various problems involving huge data sets. The first technique is an immediate application of large deviation bounds. The second and the third ones are sequential sampling or adaptive sampling techniques. We fix one simple problem and explain these techniques by demonstrating algorithms for this problem and discussing their correctness and efficiency.

We show a technique for estimating an upper bound of the Gowers norm of modulo functions over prime fields, which reduces the estimation to the greatest common divisor of some periodic sequences. This estimation provides inapproximability of the modulo functions by low-degree polynomials over prime fields, which is a generalization of Viola and Wigderson's result in the case of the binary field.

Personal Handy Phone (PHP), the Japanese digital cordless telephone system is being developed. The 32kbits/s ADPCM (Adaptive Differential Pulse Code Modulation) codec has been standardized for PHP. This paper describes firstly, the advanced algorithms of a Voice Activity Detection (VAD) function that reduces power dissipation of a digital cordless telephone terminal, secondly, a comfort noise generator operates in conjunction with the VAD and finally, a transmission error control based on the use of the prediction coefficients generated in the ADPCM codec. These proposed algorithms function in the low signal-to-noise ratio (SNR) environment of personal radio communications. The quality of the reconstructed speech after the process is influenced by the VAD decision errors (false detection when no voice is present, or no detection when voice is present) , the similarity of the generated comfort noise to the actual background noise, and the transmission quality. The simulation results of the performance achieved by these algorithms are shown and required loading of the computation are also given.

This paper presents a triple-band WCDMA direct conversion receiver (DCR) IC that needs a small number of off-chip components and control signals from digital baseband (DBB) IC. The DCR IC consists of 3 quadrature demodulators (QDEMs) with on-chip impedance matching circuit and an analog baseband block (ABB) that contains a low-pass filter (LPF) with fc automatic tuning circuit using no off-chip components and a linear-in-dB variable-gain amplifier (VGA) with on-chip analog high-pass filter (HPF). In order to make use of DBB control-free DC offset canceler, the DCR is designed to avoid large gain change under large interference that causes long transient response. In order to realize that characteristic without increasing quiescent current, the QDEM is used that employs class AB input stage and low-noise common mode feedback (CMFB) output stage. The DCR IC was fabricated in a SiGe BiCMOS process and occupies about 2.9 mm3.0 mm. The DCR needs SAW filters only for off-chip components and a gain control signal from DBB IC for AGC loop. The IIP3 of over -4.4 dBm for small signal input level and that of over +1.9 dBm for large signal input level are achieved. The gain compression of the desired signal is less than 0.3 dB for ACS Case-II condition.

A fast fc automatic tuning circuit suitable for WCDMA systems is proposed. The circuit employs master-slave architecture using digitally controlled Gm-C filter for avoiding long transient response. The tuning feedback loop contains a 2-bit up-down counter ADC for fast tuning operation. Furthermore, to avoid degradation of fc tuning accuracy due to reference feedthrough, an analog loop filter with notch located near reference frequency is used. The fast fc automatic tuning circuit is fabricated in a SiGe BiCMOS process. The tuning time within 200 µs is achieved for 35 chips from 2 lots and the standard deviation of 25.5 kHz is obtained for the average fc of 2.12 MHz.