This paper proposes a method for reducing the peak-to-average power ratio (PAPR) at the output signal of a digital predistortion linearizer (DPDL) that compensates for frequency dependent intermodulation distortion (IMD) components. The proposed method controls the amplitude and phase values of the frequency components corresponding to the transmission bandwidth of the output signal. A DPDL employing the proposed method simultaneously provides IMD component cancellation of out-of-band components and PAPR reduction at the output signal. This paper identifies the amplitude and phase conditions to minimize the PAPR. Experimental results based on a 2-GHz band 1-W class power amplifier show that the proposed method improves the drain efficiency of the power amplifier when degradation is allowed in the error vector magnitude. To the best knowledge of the authors, this is the first PAPR reduction method for DPDL that reduces the PAPR while simultaneously compensating for IMD components.

This paper presents a wideband digital predistortion (DPD) architecture suitable for wideband wireless systems, such as IEEE 802.11ad/WiGig, where low oversampling ratio of the digital-to-analog converter (DAC) is a bottleneck for available linearization bandwidth. In order to overcome the bandwidth limitation in the conventional DPD, the proposed DPD introduces a complex coefficient filter in the DPD signal processing, which enables it to achieve asymmetric linearization. This approach effectively suppresses one side of adjacent channel leakages with twice the bandwidth as compared to the conventional DPD. The concept is verified through system simulation and measurements. Using a scaled model of a 2 GHz RF carrier frequency, the measurement shows a 4.2 dB advantage over the conventional DPD in terms of adjacent channel leakage.

In this paper we describe and experimentally validate a dual-band digital predistortion (DPD) model we propose that takes account of the intermodulation and harmonic distortion produced when the center frequencies of input bands have a harmonic relationship. We also describe and experimentally validate our proposed novel dual-band power amplifier (PA) linearization architecture consisting of a single feedback loop employing a dual-band mixer. Experiment results show that the DPD linearization the proposed model provides can compensate for intermodulation and harmonic distortion in a way that the conventional two-dimensional (2-D) DPD approach cannot. The proposed feedback architecture should make it possible to simplify analog-to-digital converter (ADC) design and eliminate the time lag between different feedback paths.

In this paper, a new Hammerstein predistorter modeling for power amplifier (PA) linearization is proposed. The key feature of the model is that the cubic splines, instead of conventional high-order polynomials, are utilized as the static nonlinearities due to the fact that the splines are able to represent hard nonlinearities accurately and circumvent the numerical instability problem simultaneously. Furthermore, according to the amplifier's AM/AM and AM/PM characteristics, real-valued cubic spline functions are utilized to compensate the nonlinear distortion of the amplifier and the following finite impulse response (FIR) filters are utilized to eliminate the memory effects of the amplifier. In addition, the identification algorithm of the Hammerstein predistorter is discussed. The predistorter is implemented on the indirect learning architecture, and the separable nonlinear least squares (SNLS) Levenberg-Marquardt algorithm is adopted for the sake that the separation method reduces the dimension of the nonlinear search space and thus greatly simplifies the identification procedure. However, the convergence performance of the iterative SNLS algorithm is sensitive to the initial estimation. Therefore an effective normalization strategy is presented to solve this problem. Simulation experiments were carried out on a single-carrier WCDMA signal. Results show that compared to the conventional polynomial predistorters, the proposed Hammerstein predistorter has a higher linearization performance when the PA is near saturation and has a comparable linearization performance when the PA is mildly nonlinear. Furthermore, the proposed predistorter is numerically more stable in all input back-off cases. The results also demonstrate the validity of the convergence scheme.

This paper describes a high power GaN-FET amplifier which is developed for wideband code division multiple access (W-CDMA) base stations. We design a bias network which is symmetrically arranged to the RF line (two way bias network) in order to reduce impedance at a baseband frequency of the multi-carrier W-CDMA signal. As a result, the amplifier with the two way bias network successfully suppressed memory effects. Therefore, the application of a DPD technique to the GaN-FET amplifier with the two way bias network demonstrates almost 20 dB linearity improvement in IM3 and considerable improvement in higher order IMD, resulting in low IMD of less than -50 dBc at the highest ever reported W-CDMA average output power of 76 W.

In recent years, digital predistortion linearizers have been used in power amplifiers for mobile communications because they are simpler and provide higher power efficiency than conventional feedforward systems. However, in systems that cover a wider frequency band, it is impossible to disregard the frequency characteristics of their various parameters since the degradation that can result causes a decline in output power efficiency which is the most important property of a power amplifier. To date, no detailed studies have been carried out on predistortion compensation systems. Thus, we focused our research on these systems and in this paper we report the simulation and experimental results we obtained for clarifying these effects. In our experiments, we used a W-CDMA power amplifier to determine how much the distortion compensation effect is degraded by the frequency characteristics of analog RF circuits. The results of experiments to determine the relationship between the ACLR (Adjacent Channel Leakage power Ratio) and power efficiency are also reported.