Noise-Tolerant DAC BIST Scheme Using Integral Calculus Approach

Hyeonuk SON; Incheol KIM; Sang-Goog LEE; Jin-Ho AHN; Jeong-Do KIM; Sungho KANG

doi:10.1587/transele.E94.C.1344

Noise-Tolerant DAC BIST Scheme Using Integral Calculus Approach

Hyeonuk SON, Incheol KIM, Sang-Goog LEE, Jin-Ho AHN, Jeong-Do KIM, Sungho KANG

Full Text Views

0

Share
Cite this

Summary :

This paper proposes a built-in self-test (BIST) scheme for noise-tolerant testing of a digital-to-analogue converter (DAC). The proposed BIST calculates the differences in output voltages between a DAC and test modules. These differences are used as the inputs of an integrator that determines integral nonlinearity (INL). The proposed method has an advantage of random noise cancelation and achieves a higher test accuracy than do the conventional BIST methods. The simulation results show high standard noise-immunity and fault coverage for the proposed method.

Publication: IEICE TRANSACTIONS on Electronics Vol.E94-C No.8 pp.1344-1347

Publication Date: 2011/08/01

Publicized

Online ISSN: 1745-1353

DOI: 10.1587/transele.E94.C.1344

Type of Manuscript: LETTER

Category: Electronic Circuits

Cite this

Copy

Hyeonuk SON, Incheol KIM, Sang-Goog LEE, Jin-Ho AHN, Jeong-Do KIM, Sungho KANG, "Noise-Tolerant DAC BIST Scheme Using Integral Calculus Approach" in IEICE TRANSACTIONS on Electronics, vol. E94-C, no. 8, pp. 1344-1347, August 2011, doi: 10.1587/transele.E94.C.1344.
Abstract: This paper proposes a built-in self-test (BIST) scheme for noise-tolerant testing of a digital-to-analogue converter (DAC). The proposed BIST calculates the differences in output voltages between a DAC and test modules. These differences are used as the inputs of an integrator that determines integral nonlinearity (INL). The proposed method has an advantage of random noise cancelation and achieves a higher test accuracy than do the conventional BIST methods. The simulation results show high standard noise-immunity and fault coverage for the proposed method.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/transele.E94.C.1344/_p

Copy

@ARTICLE{e94-c_8_1344,
author={Hyeonuk SON, Incheol KIM, Sang-Goog LEE, Jin-Ho AHN, Jeong-Do KIM, Sungho KANG, },
journal={IEICE TRANSACTIONS on Electronics},
title={Noise-Tolerant DAC BIST Scheme Using Integral Calculus Approach},
year={2011},
volume={E94-C},
number={8},
pages={1344-1347},
abstract={This paper proposes a built-in self-test (BIST) scheme for noise-tolerant testing of a digital-to-analogue converter (DAC). The proposed BIST calculates the differences in output voltages between a DAC and test modules. These differences are used as the inputs of an integrator that determines integral nonlinearity (INL). The proposed method has an advantage of random noise cancelation and achieves a higher test accuracy than do the conventional BIST methods. The simulation results show high standard noise-immunity and fault coverage for the proposed method.},
keywords={},
doi={10.1587/transele.E94.C.1344},
ISSN={1745-1353},
month={August},}

Copy

TY - JOUR
TI - Noise-Tolerant DAC BIST Scheme Using Integral Calculus Approach
T2 - IEICE TRANSACTIONS on Electronics
SP - 1344
EP - 1347
AU - Hyeonuk SON
AU - Incheol KIM
AU - Sang-Goog LEE
AU - Jin-Ho AHN
AU - Jeong-Do KIM
AU - Sungho KANG
PY - 2011
DO - 10.1587/transele.E94.C.1344
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E94-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 2011
AB - This paper proposes a built-in self-test (BIST) scheme for noise-tolerant testing of a digital-to-analogue converter (DAC). The proposed BIST calculates the differences in output voltages between a DAC and test modules. These differences are used as the inputs of an integrator that determines integral nonlinearity (INL). The proposed method has an advantage of random noise cancelation and achieves a higher test accuracy than do the conventional BIST methods. The simulation results show high standard noise-immunity and fault coverage for the proposed method.
ER -