A method to detect open node defects that cannot be detected by the conventional IDDQ test method has previously been proposed employing a sinusoidal wave superposed on the DC supply voltage. The present paper proposes a strategy to improve the detectability of the test method by means of frequency analysis of the supply current. In this strategy, defects are detected by determining whether secondary harmonics of the sinusoidal wave exist in the supply current. The effectiveness of the method is confirmed by experiments on two CMOS NAND gate packages (SSIs).
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copy
Hiroyuki MICHINISHI, Tokumi YOKOHIRA, Takuji OKAMOTO, Toshifumi KOBAYASHI, Tsutomu HONDO, "Detection of CMOS Open Node Defects by Frequency Analysis" in IEICE TRANSACTIONS on Information,
vol. E90-D, no. 3, pp. 685-687, March 2007, doi: 10.1093/ietisy/e90-d.3.685.
Abstract: A method to detect open node defects that cannot be detected by the conventional IDDQ test method has previously been proposed employing a sinusoidal wave superposed on the DC supply voltage. The present paper proposes a strategy to improve the detectability of the test method by means of frequency analysis of the supply current. In this strategy, defects are detected by determining whether secondary harmonics of the sinusoidal wave exist in the supply current. The effectiveness of the method is confirmed by experiments on two CMOS NAND gate packages (SSIs).
URL: https://globals.ieice.org/en_transactions/information/10.1093/ietisy/e90-d.3.685/_p
Copy
@ARTICLE{e90-d_3_685,
author={Hiroyuki MICHINISHI, Tokumi YOKOHIRA, Takuji OKAMOTO, Toshifumi KOBAYASHI, Tsutomu HONDO, },
journal={IEICE TRANSACTIONS on Information},
title={Detection of CMOS Open Node Defects by Frequency Analysis},
year={2007},
volume={E90-D},
number={3},
pages={685-687},
abstract={A method to detect open node defects that cannot be detected by the conventional IDDQ test method has previously been proposed employing a sinusoidal wave superposed on the DC supply voltage. The present paper proposes a strategy to improve the detectability of the test method by means of frequency analysis of the supply current. In this strategy, defects are detected by determining whether secondary harmonics of the sinusoidal wave exist in the supply current. The effectiveness of the method is confirmed by experiments on two CMOS NAND gate packages (SSIs).},
keywords={},
doi={10.1093/ietisy/e90-d.3.685},
ISSN={1745-1361},
month={March},}
Copy
TY - JOUR
TI - Detection of CMOS Open Node Defects by Frequency Analysis
T2 - IEICE TRANSACTIONS on Information
SP - 685
EP - 687
AU - Hiroyuki MICHINISHI
AU - Tokumi YOKOHIRA
AU - Takuji OKAMOTO
AU - Toshifumi KOBAYASHI
AU - Tsutomu HONDO
PY - 2007
DO - 10.1093/ietisy/e90-d.3.685
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E90-D
IS - 3
JA - IEICE TRANSACTIONS on Information
Y1 - March 2007
AB - A method to detect open node defects that cannot be detected by the conventional IDDQ test method has previously been proposed employing a sinusoidal wave superposed on the DC supply voltage. The present paper proposes a strategy to improve the detectability of the test method by means of frequency analysis of the supply current. In this strategy, defects are detected by determining whether secondary harmonics of the sinusoidal wave exist in the supply current. The effectiveness of the method is confirmed by experiments on two CMOS NAND gate packages (SSIs).
ER -