Author Search Result

[Author] Akihiko SHINYA(6hit)

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  • Neural Network Calculations at the Speed of Light Using Optical Vector-Matrix Multiplication and Optoelectronic Activation

    Naoki HATTORI  Jun SHIOMI  Yutaka MASUDA  Tohru ISHIHARA  Akihiko SHINYA  Masaya NOTOMI  

     
    PAPER

      Pubricized:
    2021/05/17
      Vol:
    E104-A No:11
      Page(s):
    1477-1487

    With the rapid progress of the integrated nanophotonics technology, the optical neural network architecture has been widely investigated. Since the optical neural network can complete the inference processing just by propagating the optical signal in the network, it is expected more than one order of magnitude faster than the electronics-only implementation of artificial neural networks (ANN). In this paper, we first propose an optical vector-matrix multiplication (VMM) circuit using wavelength division multiplexing, which enables inference processing at the speed of light with ultra-wideband. This paper next proposes optoelectronic circuit implementation for batch normalization and activation function, which significantly improves the accuracy of the inference processing without sacrificing the speed performance. Finally, using a virtual environment for machine learning and an optoelectronic circuit simulator, we demonstrate the ultra-fast and accurate operation of the optical-electronic ANN circuit.

  • A Synthesis Method Based on Multi-Stage Optimization for Power-Efficient Integrated Optical Logic Circuits

    Ryosuke MATSUO  Jun SHIOMI  Tohru ISHIHARA  Hidetoshi ONODERA  Akihiko SHINYA  Masaya NOTOMI  

     
    PAPER

      Pubricized:
    2021/05/18
      Vol:
    E104-A No:11
      Page(s):
    1546-1554

    Optical logic circuits based on integrated nanophotonics attract significant interest due to their ultra-high-speed operation. However, the power dissipation of conventional optical logic circuits is exponential to the number of inputs of target logic functions. This paper proposes a synthesis method reducing power dissipation to a polynomial order of the number of inputs while exploiting the high-speed nature. Our method divides the target logic function into multiple sub-functions with Optical-to-Electrical (OE) converters. Each sub-function has a smaller number of inputs than that of the original function, which enables to exponentially reduce the power dissipated by an optical logic circuit representing the sub-function. The proposed synthesis method can mitigate the OE converter delay overhead by parallelizing sub-functions. We apply the proposed synthesis method to the ISCAS'85 benchmark circuits. The power consumption of the conventional circuits based on the Binary Decision Diagram (BDD) is at least three orders of magnitude larger than that of the optical logic circuits synthesized by the proposed method. The proposed method reduces the power consumption to about 100mW. The delay of almost all the circuits synthesized by the proposed method is kept less than four times the delay of the conventional BDD-based circuit.

  • Methods for Reducing Power and Area of BDD-Based Optical Logic Circuits

    Ryosuke MATSUO  Jun SHIOMI  Tohru ISHIHARA  Hidetoshi ONODERA  Akihiko SHINYA  Masaya NOTOMI  

     
    PAPER

      Vol:
    E102-A No:12
      Page(s):
    1751-1759

    Optical circuits using nanophotonic devices attract significant interest due to its ultra-high speed operation. As a consequence, the synthesis methods for the optical circuits also attract increasing attention. However, existing methods for synthesizing optical circuits mostly rely on straight-forward mappings from established data structures such as Binary Decision Diagram (BDD). The strategy of simply mapping a BDD to an optical circuit sometimes results in an explosion of size and involves significant power losses in branches and optical devices. To address these issues, this paper proposes a method for reducing the size of BDD-based optical logic circuits exploiting wavelength division multiplexing (WDM). The paper also proposes a method for reducing the number of branches in a BDD-based circuit, which reduces the power dissipation in laser sources. Experimental results obtained using a partial product accumulation circuit used in a 4-bit parallel multiplier demonstrates significant advantages of our method over existing approaches in terms of area and power consumption.

  • Si-Based Photonic Crystals and Photonic-Bandgap Waveguides

    Masaya NOTOMI  Akihiko SHINYA  Eiichi KURAMOCHI  Itaru YOKOHAMA  Chiharu TAKAHASHI  Koji YAMADA  Jun-ichi TAKAHASHI  Takayuki KAWASHIMA  Shojiro KAWAKAMI  

     
    INVITED PAPER-New Devices

      Vol:
    E85-C No:4
      Page(s):
    1025-1032

    We studied various types of 2D and 3D Si-based photonic crystal structures that are promising for future photonic integrated circuit application. With regard to 2D SOI photonic crystal slabs, we confirmed the formation of a wide photonic bandgap at optical communication wavelengths, and used structural tuning to realize efficient single-mode line-defect waveguides operating within the bandgap. As regards 3D photonic crystals, we used a combination of lithography and the autocloning deposition method to realize complicated 3D structures. We used this strategy to fabricate 3D full-gap photonic crystals and 3D/2D hybrid photonic crystals.

  • High-Temperature Operation of Photonic-Crystal Lasers for On-Chip Optical Interconnection Open Access

    Koji TAKEDA  Tomonari SATO  Takaaki KAKITSUKA  Akihiko SHINYA  Kengo NOZAKI  Chin-Hui CHEN  Hideaki TANIYAMA  Masaya NOTOMI  Shinji MATSUO  

     
    PAPER

      Vol:
    E95-C No:7
      Page(s):
    1244-1251

    To meet the demand for light sources for on-chip optical interconnections, we demonstrate the continuous-wave (CW) operation of photonic-crystal (PhC) nanocavity lasers at up to 89.8 by using InP buried heterostructures (BH). The wavelength of a PhC laser can be precisely designed over a wide range exceeding 100 nm by controlling the lattice constant of the PhC. The dynamic responses of the PhC laser are also demonstrated with a 3-dB bandwidth of over 7.0 GHz at 66.2. These results reveal the laser's availability for application to wavelength division multiplexed (WDM) optical interconnection on CMOS chips. We discuss the total bandwidths of future on-chip optical interconnections, and report the capabilities of PhC lasers.

  • Photonic-Band-Gap Waveguides and Resonators in SOI Photonic Crystal Slabs

    Masaya NOTOMI  Akihiko SHINYA  Eiichi KURAMOCHI  Satoshi MITSUGI  Han-Youl RYU  Tatsuro KAWABATA  Tai TSUCHIZAWA  Toshifumi WATANABE  Tetsufumi SHOJI  Koji YAMADA  

     
    PAPER

      Vol:
    E87-C No:3
      Page(s):
    398-408

    The design, fabrication, and measurement of photonic-band-gap (PBG) waveguides and resonators in two-dimensional photonic crystal slabs have been investigated. Although photonic crystal slabs have only partial gaps, efficient waveguides and resonators can be realized by appropriate design. As regards PBG waveguides, we show various designs for efficient single-mode waveguides in PhC slabs with SiO2 cladding, we report group dispersion measurements of PBG waveguides in PhC slabs, and describe the successful fabrication of PBG waveguides with adiabatic connectors that enable us to couple the light from single-mode fibers efficiently to PBG waveguides. As regards PBG resonators, we show how to realize very high-Q and small volume resonators in hexagonal PhC slabs, and report the fabrication of resonant tunneling filters that consist of PBG resonators coupled with PBG waveguides. We also describe the successful fabrication of resonant tunneling mode-gap filters with adiabatic mode connectors.

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