This paper presents a wideband digital predistortion (DPD) architecture suitable for wideband wireless systems, such as IEEE 802.11ad/WiGig, where low oversampling ratio of the digital-to-analog converter (DAC) is a bottleneck for available linearization bandwidth. In order to overcome the bandwidth limitation in the conventional DPD, the proposed DPD introduces a complex coefficient filter in the DPD signal processing, which enables it to achieve asymmetric linearization. This approach effectively suppresses one side of adjacent channel leakages with twice the bandwidth as compared to the conventional DPD. The concept is verified through system simulation and measurements. Using a scaled model of a 2 GHz RF carrier frequency, the measurement shows a 4.2 dB advantage over the conventional DPD in terms of adjacent channel leakage.

We propose a new band selective stop filter construction to decrease the out of band intermodulation distortion (IMD) noise generated in the transmitting power amplifier. Suppression of IMD noise directly improves the adjacent channel leakage power ratio (ACLR). A high-temperature superconducting (HTS) device with extremely high-Q performance with very small hybrid IC pattern would make it possible to implement the proposed filter construction as a practical device. To confirm the effectiveness of the HTS reaction-type filter (HTS-RTF) in improving ACLR, investigations based on both experiments and numerical analyses are carried out. The structure of a 5-GHz split open-ring resonator is investigated; its targets include high-unload Q-factor, low current densities, and low radiation. A designed 5-GHz HTS-RTF with 4 MHz suppression bandwidth and more than 40 dB MHz-1 sharp skirt is fabricated and experimentally investigated. The measured ACLR values are improved by a maximum of 12.8 dB and are constant up to the passband signal power of 40 dBm. In addition, to examine the power efficiency improvement offered by noise suppression of the HTS-RTF, numerical analyses based on measured results of gallium nitride HEMT power amplifier characteristics are conducted. The analyzed results shows the drain efficiency of the amplifier can be improved to 44.2% of the amplifier with the filter from the 15.7% of the without filter.

This paper describes 950 GHz power performance of double-doped AlGaAs/InGaAs/AlGaAs heterojunction field-effect transistors (HJFET) operated at a drain bias voltage ranging from 2.5 to 3.5 V. The developed 1.0 µm gatelength HJFET exhibited a maximum drain current (Imax) of 500 mA/mm, a transconductance (gm) of 300 mS/mm, and a gate-to-drain breakdown voltage of 11 V. Operated at 3.0 V, a 17.5 mm gate periphery HJFET showed 1.4 W Pout and -50.3 dBc adjacent channel leakage power at a 50 kHz off-carrier frequency from 950 MHz with 50% PAE. Harmonic balance simulations revealed that the flat gm characteristics of the HJFET with respect to gate bias voltage are effective to suppress intermodulation distortion under large signal operation. The developed HJFET has great potential for small-sized digital cellular power applications operated at a low DC supply voltage.

A high efficiency and low voltage operation GaAs power amplifier module has been developed for the application to 1.5 GHz Japanese digital cellular phones. This paper summarizes the design method to increase efficiency and to reduce adjacent channel leakage power. Operated at a low drain bias voltage of 4.6 V, the power amplifier module delivers an output power of 1.5 W with 46% power-added efficiency and -52 dBs adjacent channel leakage power.