In the infrastructure-less disaster environment, the application of the peer-to-peer (P2P) group conference over mobile ad hoc network (MANET) can be used to communicate with each other when the rescue crews search the survivors but work separately. However, there still are several problems of in-time multimedia delivery in P2P-MANET: (1) MANET mobility influences the maintenance of P2P overlay. (2) P2P overlay is not proximal to MANET topology, this leads to the inefficient streaming delivery. (3) The unreliable wireless connection leads to the difficulty of multi-source P2P group conferencing. Therefore, P2P conferencing cannot work well on MANET. To overcome the above disadvantages, in this paper, we present a cross-layer P2P group conferencing mechanism over MANET, called RING (Real-time Intercommunication Network Gossip). The RING uses the ring overlay to manage peers and utilizes the cross-layer mechanism to force the ring overlay to be proximal to MANET topology. Therefore, RING can lead efficient in-time multimedia streaming delivery. On the other hand, the ring overlay can deal with peer joining/leaving fast and simply, and improves the delivery efficiency with the minimum signaling overhead. Through mathematical theory and a series of experiments, we demonstrate that RING is workable and it can shorten the source-to-end delay with minimal signaling overhead.

This work presents a real-time human detection system for VGA (Video Graphics Array, 640480) video, which well suits visual surveillance applications. To achieve high running speed and accuracy, firstly we design multiple fast scalar feature types on the gradient channels, and experimentally identify that NOGCF (Normalized Oriented Gradient Channel Feature) has better performance with Gentle AdaBoost in cascaded classifiers. A confidence measure for cascaded classifiers is developed and utilized in the subsequent tracking stage. Secondly, we propose to use speedup techniques including a detector pyramid for multi-scale detection and channel compression for integral channel calculation respectively. Thirdly, by integrating the detector's discrete detected humans and continuous detection confidence map, we employ a two-layer tracking by detection algorithm for further speedup and accuracy improvement. Compared with other methods, experiments show the system is significantly faster with 20 fps running speed in VGA video and has better accuracy as well.

With the consideration of real-time stream processing technology, it's important to develop high availability mechanism to guarantee stream-based application not interfered by faults caused by potential anomalies. In this paper, we present a novel online prediction technique for predicting some anomalies which may occur in the near future. Concretely, we first present a value prediction which combines the Hidden Markov Model and the Mixture of Expert Model to predict the values of feature metrics in the near future. Then we employ the Support Vector Machine to do anomaly identification, which is a procedure to identify the kind of anomaly that we are about to alarm. The purpose of our approach is to achieve a tradeoff between fault penalty and resource cost. The experiment results show that our approach is of high accuracy for common anomaly prediction and low runtime overhead.

The proposed scheduling scheme minimizes the mean power consumption of real-time tasks with probabilistic computation amounts while meeting their deadlines. Our study formally solves the minimization problem under finitely discrete clock frequencies with irregular power consumptions, whereas state-of-the-arts studies did under infinitely continuous clock frequencies with regular power consumptions.

This paper proposes a video-quality estimation method based on a reduced-reference model for realtime quality monitoring in video streaming services. The proposed method chooses representative-luminance values for individual original-video frames at a server side and transmits those values, along with the pixel-position information of the representative-luminance values in each frame. On the basis of this information, peak signal-to-noise ratio (PSNR) values at client sides can be estimated. This enables realtime monitoring of video-quality degradation by transmission errors. Experimental results show that accurate PSNR estimation can be achieved with additional information at a low bit rate. For SDTV video sequences which are encoded at 1 to 5 Mbps, accurate PSNR estimation (correlation coefficient of 0.92 to 0.95) is achieved with small amount of additional information of 10 to 50 kbps. This enables accurate realtime quality monitoring in video streaming services without average video-quality degradation.

The proposed scheduling scheme minimizes the energy consumption of a real-time task on the multi-core processor with the dynamic voltage and frequency scaling capability. The scheme allocates a pertinent number of cores to the task execution, inactivates unused cores, and assigns the lowest frequency meeting the deadline. For a periodic real-time task with consecutive real-time instances, the scheme prepares the minimum-energy solutions for all input cases at off-line time, and applies one of the prepared solutions to each real-time instance at runtime.

Recently, a number of location-based services such as navigation and mobile advertising have been proposed. Such services require real-time user positions. Since a global positioning system (GPS), which is one of the most well-known techniques for real-time positioning, is unsuitable for indoor uses due to unavailability of GPS signals, many indoor positioning systems (IPSs) using WLAN, radio frequency identification tags, and so forth have been proposed. However, most of them suffer from high installation costs. In this paper, we propose a novel IPS for real-time positioning that utilizes a digital audio watermarking technique. The proposed IPS first embeds watermarks into an audio signal to generate watermarked signals, each of which is then emitted from a corresponding speaker installed in a target environment. A user of the proposed IPS receives the watermarked signals with a mobile device equipped with a microphone, and the watermarks are detected in the received signal. For positioning, we model various effects upon watermarks due to propagation in the air, i.e., delays, attenuation, and diffraction. The model enables the proposed IPS to accurately locate the user based on the watermarks detected in the received signal. The proposed IPS can be easily deployed with a low installation cost because the IPS can work with off-the-shelf speakers that have been already installed in most of the indoor environments such as department stores, amusement arcades, and airports. We experimentally evaluate the accuracy of positioning and show that the proposed IPS locates the user in a 6 m by 7.5 m room with root mean squared error of 2.25 m on average. The results also demonstrate the potential capability of real-time positioning with the proposed IPS.

In this paper, an on-line nonnegative matrix factorization (NMF) algorithm for acoustic signal processing systems is developed based on the recursive least squares (RLS) method. In order to develop the on-line NMF algorithm, we reformulate the NMF problem into multiple least squares (LS) normal equations, and solve the reformulated problems using RLS methods. In addition, we eliminate the irrelevant calculations based on the NMF model. The proposed algorithm has been evaluated with a well-known dataset used for NMF performance evaluation and with real acoustic signals; the results show that the proposed algorithm performs better than the conventional algorithm in on-line applications.

Over 100 Gbit/s/ch high-speed optical transmission is required to achieve the high capacity networks that can meet future demands. The coherent receiver, which is expected to yield high frequency utilization, is a promising means of achieving such high-speed transmission. However, it requires a high-speed Analog to Digital Converter (ADC) because the received signal bandwidth would be over several tens or hundreds of GHz. To solve this problem, we propose a band-divided receiver structure for wideband optical signals. In the receiver, received wideband signals are divided into a number of narrow band signals without any guard band. We develop a band-divided receiver prototype and evaluate it in an experiment. In addition, we develop a real-time OFDM demodulator on an FPGA board that implements 1.5 GS/s ADCs. We demonstrate that the band-divided receiver prototype with its real-time OFDM demodulator and 1.5 GS/s ADC can demodulate single polarization 12 Gbit/s OFDM signals in real-time.

Power-aware scheduling of periodic tasks in real-time systems has been extensively studied to save energy while still meeting the performance requirement. Many previous studies use the probability information of tasks' execution cycles to assist the scheduling. However, most of these approaches adopt heuristic algorithms to cope with realistic CPU models with discrete frequencies and cannot achieve the globally optimal solution. Sometimes they even show worse results than non-stochastic DVS schemes. This paper presents an optimal DVS scheme for frame-based real-time systems under realistic power models in which the processor provides only a limited number of speeds and no assumption is made on power/frequency relation. A suboptimal DVS scheme is also presented in this paper to work out a solution near enough to the optimal one with only polynomial time expense. Experiment results show that the proposed algorithm can save at most 40% more energy compared with previous ones.

Background subtraction is widely used in detecting moving objects; however, changing illumination conditions, color similarity, and real-time performance remain important problems. In this paper, we introduce a sequential method for adaptively estimating background components using Kalman filters, and a novel method for detecting objects using margined sign correlation (MSC). By applying MSC to our adaptive background model, the proposed system can perform object detection robustly and accurately. The proposed method is suitable for implementation on a graphics processing unit (GPU) and as such, the system realizes real-time performance efficiently. Experimental results demonstrate the performance of the proposed system.

In wireless sensor networks, real-time data delivery schemes typically achieve the desired delivery speed by proactively performing one-hop lookahead. Recently, to reduce the deadline miss ratio with respect to the desired delivery speed, a study has proposed a real-time data delivery scheme based on proactively performing two-hop lookahead. However, the recent proposal might cause heavy message exchange overhead and high computing complexity in order to proactively obtain two-hop neighbor speed information in all sensor nodes whether data are delivered or not. In this paper, we propose a novel real-time data delivery scheme that applies on-demand multi-hop lookahead only around data forwarding paths. Hence, the scheme can provide lower deadline miss ratio for real-time data delivery with low message exchange overhead than existing schemes.

The proposed scheduling scheme minimizes the mean energy consumption of a real-time parallel task, where the task has the probabilistic computation amount and can be executed concurrently on multiple cores. The scheme determines a pertinent number of cores allocated to the task execution and the instant frequency supplied to the allocated cores. Evaluation shows that the scheme saves manifest amount of the energy consumed by the previous method minimizing the mean energy consumption on a single core.

In terrain visualization, the quadtree is the most frequently used data structure for progressive mesh generation. The quadtree provides an efficient level of detail selection and view frustum culling. However, most applications using quadtrees are performed on the CPU, because the pointer and recursive operation in hierarchical data structure cannot be manipulated in a programmable rendering pipeline. We present a quadtree-based terrain rendering method for GPU (Graphics Processing Unit) execution that uses vertex splitting and triangle splitting. Vertex splitting supports a level of detail selection, and triangle splitting is used for crack removal. This method offers higher performance than previous CPU-based quadtree methods, without loss of image quality. We can then use the CPU for other computations while rendering the terrain using only the GPU.

Wireless Sensor Network(WSN) is widely used in Emergency Management System(EMS) to assure high safety. Real-timely transmitting emergency information in dynamically changing environment should be assured in mission critical district. Conventional methods based on static situations and centralized approaches can not satisfy this requirement. In this paper, to assure real-time property, autonomous community construction technology is proposed to set special area called community which includes a special passage composed of several routers for emergency information's transmission and routers around this passage in one hop range. Emergency information's transmission is protected by routers around this passage from interference of other sensing information's transmission in and outside community. Moreover, autonomous community reconstruction technology is proposed to guarantee real-time property at failure conditions. In this technology, community members autonomously cooperate and coordinate with each other to setup a bypass in community for transmitting emergency information if fault happens. Evaluation results indicate effectiveness of proposed technology.

Utilizing a heterogeneous multiprocessor system has become a popular design paradigm to build an embedded system at a cheap cost. A reliability issue, which is vulnerability to soft errors, has not been taken into account in the conventional IC (integrated circuit) design flow, while chip area, performance, and power consumption have been done. This paper presents a system design paradigm in which a heterogeneous multiprocessor system is synthesized and its chip area is minimized under real-time and reliability constraints. First we define an SEU vulnerability factor as a vulnerability measure for computer systems so that we evaluate task-wise reliability over various processor structures. Next we build a mixed integer linear programming (MILP) model for minimizing the chip area of a heterogeneous multiprocessor system under real-time and SEU vulnerability constraints. Finally, we show several experimental results on our synthesis approach. Experimental results show that our design paradigm has achieved automatic generation of cost-competitive and reliable heterogeneous multiprocessor systems.

In an embedded control system, control performances of each job depend on its latency and a control algorithm implemented in it. In order to adapt a job set to optimize control performances subject to schedulability, we design several types of control software for each job, which will be called versions, and select one version from them when the job is released. A real-time system where each job has several versions is called a multiversion real-time system. A benefit and a CPU utilization of a job depend on the versions. So, it is an important problem to select a version of each job so as to maximize the total benefit of the system subject to a schedulability condition. Such a problem will be called an optimal configuration problem. In this paper, we assume that each version is specified by the relative deadline, the execution time, and the benefit. We show that the optimal configuration problem is transformed to a maximum path length problem. We propose an optimal algorithm based on the forward dynamic programming. Moreover, we propose sub-optimal algorithms to reduce computation times. The efficiencies of the proposed algorithms are illustrated by simulations.

This paper describes an affine motion estimation processor for real-time video segmentation. The processor estimates the dominant motion of a target region with affine parameters. The processor is based on the Pseudo-M-estimator algorithm. Introduction of an image division method and a binary weight method to the original algorithm reduces data traffic and hardware costs. A pixel sampling method is proposed that reduces the clock frequency by 50%. The pixel pipeline architecture and a frame overlap method double throughput. The processor was prototyped on an FPGA; its function and performance were subsequently verified. It was also implemented as an ASIC. The core size is 5.05.0 mm2 in 0.18 µm process, standard cell technology. The ASIC can accommodate a VGA 30 fps video with 120 MHz clock frequency.

An antidictionary is particularly useful for data compression, and on-line electrocardiogram (ECG) lossless compression algorithms using antidictionaries have been proposed. They work in real-time with constant memory and give better compression ratios than traditional lossless data compression algorithms, while they only deal with ECG data on a binary alphabet. This paper proposes on-line ECG lossless compression for a given data on a finite alphabet. The proposed algorithm gives not only better compression ratios than those algorithms but also uses less computational space than they do. Moreover, the proposed algorithm work in real-time. Its effectiveness is demonstrated by simulation results.

This paper proposes an energy efficient processor which can be used as a design alternative for the dynamic voltage scaling (DVS) processors in embedded system design. The processor consists of multiple PE (processing element) cores and a selective set-associative cache memory. The PE-cores have the same instruction set architecture but differ in their clock speeds and energy consumptions. Only a single PE-core is activated at a time and the other PE-cores are deactivated using clock gating and signal gating techniques. The major advantage over the DVS processors is a small overhead for changing its performance. The gate-level simulation demonstrates that our processor can change its performance within 1.5 microsecond and dissipates about 10 nano-joule while conventional DVS processors need hundreds of microseconds and dissipate a few micro-joule for the performance transition. This makes it possible to apply our multi-performance processor to many real-time systems and to perform finer grained and more sophisticated dynamic voltage control.