With the advent of digital video and digital broadcasting, copyright protection of video data has been one of the most important issues. We present in this paper a novel method of digital watermark for video data based on the discrete wavelet transform. In this method, we embed the watermark in the lowest frequency components of each frame in the uncoded video by using a controlled quantization process. The watermark can be extracted directly from the decoded video without access to the original video. Experimental results show that the proposed method gives the watermarked image of better quality and is robust against MPEG coding and re-encoding. Furthermore, we discuss multiple watermarking with regard to the generational copy control for video contents.

This paper proposes a phase assignment algorithm "Silent Wave Algorithm (SWA)" for real-time MPEG traffic in ATM networks. Our algorithm decides when a new MPEG source should begin to transmit based on its notification parameters and traffic measurement of ongoing connections. Simulation results show that it is hard to accommodate MPEG traffic effectively without any control of phase assignment. On the other hand, the SWA can provide better QOS and improve the network utilization.

Multimedia communications over mobile networks suffer from fluctuating channel degradation. Conventional error handling schemes consist of the first stage error correction decoding in wireless interface and the second stage error correction decoding in multimedia demultiplexer, where the second stage decoding result is not used to improve the first stage decoding performance. To meet the requirements of more powerful error protection, we propose iterative soft-input/soft-output error correction decoding in multimedia communications, where the likelihood output generated by the error correction decoding in multimedia demultiplexer is fed back to the decoding in wireless interface and the decoding procedure is iterated. The performances were evaluated by MPEG-4 video transmission simulation over mobile channels.

The MPEG video coding is the most widely used video coding standard which usually generates variable bitrate (VBR) data streams. Although ATM can deliver VBR traffic, the burst traffic still has the possibility to be dropped due to network congestion. The cell loss can be minimized by using an enforced rate control method. However, the quality of the reproduced video may be sacrificed due to insufficient peak rate available. In this work, we propose an end-to-end quality adaptation mechanism for MPEG traffic over ATM. The adaptive quality control (AQC) scheme allocates a certain number of coding bits to each video frame based on the network condition and the type of next frame. More bits may be allocated if the network condition, represented by the connection-level, is good or the next frame is B-frame that usually consumes fewer bits. A high connection-level allows a relatively large number of tagged cells, which are non-guaranteed in delivery, for video frames with high peak rates. The connection-level adjustment unit at the encoder end adjusts the connection-level based on the message of the network condition from the quality monitoring unit at decoder. The simulation results show that the AQC system can effectively utilize the channel bandwidth as well as maintain satisfactory video quality in various network conditions.

For the reduction of the jitter originated from the cell losses in ATM network when CBR traffic is transferred on AAL5, we propose that the receiver maintain a timer whose expiration time is proportional to the cell time of the source traffic plus the standard deviation of the 1-point CDV of the received ATM cells. Moreover, to enhance the granularity of the error or loss detection mechanism in the AAL5 PDUs, we also modified the AAL5 PDU trailer fields so that each cell comprising the AAL5 PDU has a sequence number field. The simulation results show that the peak-to-peak PDV of the AAL5 PDU by the proposed method is less than 69.4% to that by AAL5. Moreover, the AAL5 user receives the same or more error-free transport packets in the proposed algorithm than those in the ITU-T AAL5 for the same network simulation environment.

An approach to an MPEG decoding system with reduced memory capacity will be presented. This method relies on the simple technique of one-dimensional DPCM to recompress reconstructed Macro Block (MB) prior to being stored on frame memory. Simulation results suggest that image quality is subjectively acceptable when using approximately one-half of the memory size required by that of conventional decoder. The degradation in the signal-to-noise ratio introduced by this compression method ranged from 0.1 dB to 0.7 dB for MPEG MP@ML standard test sequences at 4 Mbps. This technique can be implemented to achieve a cost effective MPEG decoder.

In many applications of digital video database systems such as digital library, video data is often compressed with MPEG video algorithms. It will be an important technique to insert the additional information data like indexes and contents effectively into video database which is compressed with MPEG, because we can always deal with the additional information with video data itself easily. We propose a method for inserting optional binary data such as index information of digital library into MPEG-1 and -2 bitstreams. The binary data inserted MPEG video bitstreams using our proposed scheme are also according to the specification of the MPEG video frame structure. The proposed method allows us to extract the inserted binary data perfectly though MPEG-1 and -2 video are lossy algorithms. And the quality of decoded images after extracting added information is almost the same as that of ordinary MPEG bitstreams. Furthermore, traditional standard MPEG-1 and -2 video decoder which can not extract inserted binary data can also decode images from the binary data inserted MPEG video bitstreams without obvious image degradation. There are some different points between the proposed insertion technique of the binary data and the watermarking technique. The technique of watermarking prepares to deal with alter watermarking by others. And the technique of watermarking is required for the identification of the signature and the perfect extraction of the inserted image signature is not required in the lossy MPEG video environment. On the other hand, we have to extract all of the inserted binary information data correctly with the insertion technique of the binary information. Simulations using MPEG video sequences with inserted binary data are presented to quantify some performance factors concerned. We have not heard about inserting data method which purpose is such as index and content information insertion.

In order to accommodate periodic and bursty sources into ATM networks effectively, we propose phase assignment control (PAC), which actively controls the phase of the new connection at its connection setup phase. To realize PAC, we develop an algorithm to find a good phase of the new connection in a short time. Simulation results show that the PAC can improve the system performance.

Cell loss is one of the most important metrics of quality of service in ATM mobile communication systems. This loss can be suppressed by introducing buffer memories in the network, but that sacrifices delay. This paper proposes a lossless handover scheme for ATM mobile communication networks that can suppress delay fluctuations, and presents a subjective evaluation of MPEG2 images with various buffer memory sizes.

Thanks to rapid progress in computer technology and VLSI technology, we are approaching the stage where ordinary PCs will be able to handle real-time video signals as easily as they handle text data. First, features and applications of the video compression standard MPEG2 are surveyed as a typical video processing. It is clarified that real-time capability becomes more important as applications of MPEG2 widely spread. The trends of video coding in LSIs are summarized. And it is shown that the most advanced encoder/decoder LSI has an improved price-performance ratio that allows it to be adopted in consumer equipment. Finally, future directions of parallel architecture in video processing are surveyed in terms of special-purpose and general-purpose processing. The special approach has always taken the lead in video processing using sophisticated hardware-oriented parallel architectures. The general-purpose architecture method has gradually evolved in accordance with a software-oriented architecture. Both approaches will continue to evolve into a new stage by selecting possible parallel architectures such as multimedia instruction sets and process-level parallelism, and applying them in compound use. The so-called super processor architecture will emerge in the near future and it will be an ideal method that can manage rapid increase in requirements of capability and applicability in video processing.

The project of interconnecting CATV in Hyogo Prefecture, Japan has started since March, 1998. In this project, there are three CATV companies in Hanshin area; Kobe, Nishinomiya and Amagasaki. An ATM switch is equipped in each company and these CATVs are connected serially in the above order. Each company provides the video service to the rest of companies using the MPEG2 over ATM. Each MPEG2 stream is sent to the other two CATV companies according to the function of multicast implemented in ATM switch. In the coverage of each CATV, subscribers utilize Internet connection using cable modems as well as standard CATV broadcasting service. In this paper, we present the outline of the research project in Hyogo Prefecture, Japan, and examine the jitter processes of MPEG streams of the testbed network by the simulation. In our testbed network, cells with two types of requirement for QoS are multiplexed; cells for MPEG2 which require the real-time transmission and those for Internet packets which are much more sensitive for the cell loss ratio. We investigate the jitter processes under some scenarios and show how the jitter process is affected by the Internet traffic and the other cell streams of MPEG2. Furthermore, we study the effect of the number of ATM switches on the jitter process when more CATV networks are added serially.

Integrating a 243 MHz dual-issue RISC processor core with a small set of dedicated hardware can create a single chip system for real-time encoding and decoding for MPEG2 MP@ML (main profile at main level). A trade-off between software and dedicated hardware is very important to decide performance of the system. This paper evaluates several MPEG2 encoding and decoding systems, focusing on both chip area and power consumption. For MPEG2 encoding, a newly introduced hybrid approach includes the processor core and the dedicated hardware that performs the discrete cosine transform (DCT), the inverse DCT (IDCT), variable length encoding (VLC) and block loading process. The estimated area for the encoder, 23. 0 mm2 using a 0. 3-micrometer 1-poly 4-metal CMOS process, is 33% smaller than that of the dedicated hardware approach. The estimated power consumption for the encoder is 13% smaller than that of the dedicated hardware approach. The dual-issue RISC processor approach has the advantage of a small chip area, low power consumption and that of being very easy to program for multimedia applications.

In this paper, a dedicated hardware design for motion estimation LSI of MPEG2 is presented. Combining our bits truncation adaptive pyramid (BTAP) algorithm with Window-MSPA architecture, the hardware cost is tremendously reduced without PSNR performance degradation for mean pyramid algorithm. The core of the test chip working at 83 MHz, performs a search range of 67 for image size of 1920 1152 and achieves video rate of 60 field/s. It can be used for HDTV purpose. The chip size is 4. 8 mm 4. 8 mm with 0. 5u 2-level metal CMOS technology. The result in this paper shows our promising future to realize one chip HDTV MPEG2 encoder.

This paper proposes a bitstream scaling technique for MPEG video for the purpose of media synchronizations. The proposed scaling technique can reduce the frame rate as well as the bit rate of an MPEG data sequence to fit them to the values specified by a synchronization system. The advantage of the proposed technique over existing scaling methods is that it is considering not only the performance of synchronization but also the picture quality of the resulting sequences. To further improve the quality of sequences scaled by the proposed method, this paper also proposes an MPEG encoding technique which sets some of the parameters suitable for the scaling. An experiment using these techniques in an actual media synchronization system has illustrated the usefulness of the proposed approach.

A dual-issue VLIW processor, running at 250 MHz, is enhanced with multimedia instructions for a sustained peak performance of 1000MOPS. The multimedia processor integrates 300 K transistors in an 8 mm2 core area and it is fabricated onto a 6 mm6. 2 mm chip with 32 kB instruction and 32 kB data RAMs in a 0. 3-micrometer, four-layer metal CMOS process. It consumes 1. 2 W at 2. 0 V running at 250 MHz. The VLIW processor achieves a speed-up of more than 4 times over a single-issue RISC for MPEG video block decoding. A decoder implemented on the multimedia processor with a small amount of dedicated hardware, such as the Huffman decoder and a DMA controller will decode the worst case 88 video block data in 754 cycles, leading to a real-time MPEG-2 system, video, and audio decoding system.

This paper proposes polling-based real-time software for MPEG2 System protocol LSIs, which is a typical embedded and real-time system on a chip, and demonstrates its performance and usefulness. The polling-based real-time software is designed and optimized by analyzing application specific function requirements and deciding scheduling intervals and the execution cycles of each task. It requires neither hardware for multiple interrupt handling nor software for heavy context switching. The polling-based approach provides sufficient performance without any hardware and software overhead for a real-time application like the MPEG2 System protocol.

This paper describes a chip set architecture and its implementation for programmable MPEG2 MP@ML (main profile at main level) video encoder. The chip set features a functional partitioning architecture based on the MPEG2 layer structure. Using this partitioning scheme, an optimized system configuration with double bus structure is proposed. In addition, a hybrid architecture with dual video-oriented on-chip RISC processors and dedicated hardware and a hierarchical pipeline scheme covering all layers are newly introduced to realize flexibility. Also, effective motion estimation is achieved by a scalable solution for high picture quality. Adopting these features, three kinds of VLSI have been developed using 0. 5 micron double metal CMOS technology. The chip set consists of a controller-LSI (C-LSI), a macroblock level pixel processor-LSI (P-LSI) and a motion estimation-LSI (ME-LSI). The chip set combined with synchronous DRAMs (SDRAM) supports all the layer processing including rate-control and realizes real-time encoding for ITU-R-601 resolution video (720480 pixels at 30 frames/s) with glue less logic. The exhaustive motion estimation capability is scalable up to 63. 5 and 15. 5 in the horizontal and vertical directions respectively. This chip set solution realizes a low cost MPEG2 video encoder system with excellent video quality on a single PC extension board. The evaluation system and application development environment is also introduced.

In live multimedia applications with multiple videos, it is necessary to develop an efficient mechanism of multiplexing several MPEG video streams into a single stream and transmitting it over network without wasting excessive bandwidth. In this paper, we present an efficient multiplexing and traffic smoothing scheme for multiple variable bit rate (VBR) MPEG video streams in live video applications with finite buffer sizes. First, we describe the constraints imposed by the allowable delay bound for each elementary stream and by the multiplexer/receiver buffer sizes. Based on these constraints, a new multiplexing and traffic smoothing scheme is designed in such a way as to smooth maximally the multiplexed transmission rate by exploiting temporal and spatial averaging effects, while avoiding the buffer overflow and underflow. Through computer experiments based on an MPEG-coded video trace of Star-wars, it is shown that the proposed scheme significantly reduces the peak rate, coefficient of variation, and effective bandwidth of the multiplexed transmission rate.

This paper describes technological and operational issues of an image-art-on-demand system, which provides visitors with high-definition images of fine art in a virtual gallery. The system is presented as a typical example of multimedia information service systems on IP over ATM network. The high-definition images of fine arts from a database are interactively selected in a virtual gallery which is generated by an advanced computer graphics (CG) workstation. The generated images of the virtual gallery are transmitted by MPEG-2 over TCP/IP on ATM at 30 frames per second. This system was opened from January 1996 to March 1997 as one project of NTT's joint utilization tests of multimedia communications. As far as we know, this system is the first real-time image-art-on-demand system using MPEG-2 on IP over ATM-WAN to be exhibited to the general public.

In this paper, a new bits truncation adaptive pyramid (BTAP) algorithm for motion estimation is presented. The method employs bits truncation of the gray level from 8bits to much less bits in the searching algorithm. Compared with conventional fast block matching algorithms, this method drastically improves speed for motion estimation of reduced gray-level images and preserves reasonable performance and algorithm reliability. Bits truncation concept is well combined with hierarchical pyramid algorithm in order to truncate adaptively according to image characteristics. The computation complexity is much less than that of pyramid algorithm and 3-Step motion estimation algorithm because of bit-truncated searbh and low overhead adaptation. Nevertheless, the PSNR property is also comparable with these two algorithms for various video sequences.