A novel compact T/R (Transmit/Receive) switching circuit for wideband T/R modules has been proposed. It employs quadrature couplers and gate-and-drain-driven HPAs to remove circulators or T/R switches from a conventional T/R module, and T/R switching is made with controlling biasing conditions of the FETs in HPAs. Furthermore, an optimum biasing condition and design of output matching circuit of the HPA have been studied to reduce loss in RX-mode, and the validity of the method has been confirmed by measurements.

A 4-12 GHz 2 W GaAs HFET amplifier has been developed. It employs two novel circuit design techniques. One is a pre-matching circuit for dual gate-bias feed. It is comprised of two shunt LCR circuits, which makes dual gate-bias feed possible. The other one is a tapered power splitting/combining FET (tapered PS/PC FET), which makes amplitude and phase imbalance between FET cells small over a wide bandwidth. In this paper, the schematic diagram and impedance characteristic of the pre-matching circuit for dual gate-bias feed are described first, showing the conditions that the impedance of FETs becomes purely resistive. Then the amplitude and phase imbalance between FET cells are compared by electromagnetic simulation for both the conventional and tapered PS/PC FETs, demonstrating that the tapered PS/PC FET has smaller amplitude and phase imbalance. Furthermore, the MSG/MAG are compared by experiment for both FETs, confirming that the tapered PS/PC FET has higher MSG/MAG. Finally, the design, fabrication, and performance of the 4-12 GHz 2 W GaAs HFET amplifier using the pre-matching circuit for dual gate-bias feed and tapered PS/PC FETs are presented to make sure that two novel circuit design techniques introduced in this paper are useful for the design of wideband lossy match power amplifiers.

A wideband monolithic lossy match power amplifier having an LPF/HPF-combined interstage network has been developed. As an interstage network, it employs an LPF (Low-Pass Filter) including FET's drain capacitance, an HPF (High-Pass Filter) comprised of a dc blocking capacitor and a drain bias circuit, and a constant-resistance network for wideband impedance matching and transformation. With the use of this interstage network, a wide bandwidth of 6 to 16.5 GHz and an output power of 30.40.9 dBm have been achieved.

This paper describes the design, fabrication, and performance of a C- to Ku-band 2 W balanced amplifier multi-chip module employing an MMIC/Super-MIC/MIC configuration. In this module, single-ended amplifiers, quadrature couplers, and pulsed-drive circuits are fabricated on MMICs, Super-MICs, and MICs, respectively, which show different features in fabrication, performance, size, and cost. With the use of the distinguished features of MMICs, Super-MICs, and MICs, the multi-chip module with high performance, small size, and low cost has been achieved. The MMIC/Super-MIC/MIC-combined module would be a candidate for a variety of multi-chip modules with stringent requirements for performance, size, and cost.