The performance improvement by CMOS circuit technology is reaching its limits. Many researchers have been studying computing technologies that use emerging devices to challenge such critical issues. Nanophotonic technology is a promising candidate for tackling the issue due to its ultra-low latency, high bandwidth, and low power characteristics. Although previous research develops hardware accelerators by exploiting nanophotonic circuits for AI inference applications, there has never been considered for the acceleration of training that requires complex Floating-Point (FP) operations. In particular, the design balance between optical and electrical circuits has a critical impact on the latency, energy, and accuracy of the arithmetic system, and thus requires careful consideration of the optimal design. In this study, we design three types of Opto-Electrical Floating-point Multipliers (OEFMs): accuracy-oriented (Ao-OEFM), latency-oriented (Lo-OEFM), and energy-oriented (Eo-OEFM). Based on our evaluation, we confirm that Ao-OEFM has high noise resistance, and Lo-OEFM and Eo-OEFM still have sufficient calculation accuracy. Compared to conventional electrical circuits, Lo-OEFM achieves an 87% reduction in latency, and Eo-OEFM reduces energy consumption by 42%.

Wide deployment of artificial intelligence (AI) is inducing exponentially growing energy consumption. Traditional digital platforms are becoming difficult to fulfill such ever-growing demands on energy efficiency as well as computing latency, which necessitates the development of high efficiency analog hardware platforms for AI. Recently, optical and electrooptic hybrid computing is reactivated as a promising analog hardware alternative because it can accelerate the information processing in an energy-efficient way. Integrated photonic circuits offer such an analog hardware solution for implementing photonic AI and machine learning. For this purpose, we proposed a photonic analog of support vector machine and experimentally demonstrated low-latency and low-energy classification computing, which evidences the latency and energy advantages of optical analog computing over traditional digital computing. We also proposed an electrooptic Hopfield network for classifying and recognizing time-series data. This paper will review our work on implementing classification computing and Hopfield network by leveraging silicon photonic circuits.

Quadrature phase-shift keying (QPSK) and 16-quadrature amplitude modulation (16QAM) formats are deployed in inter-data center networks where high transmission capacity and spectral efficiency are required. However, in intra-data center networks, a four-level pulse amplitude modulation (PAM4) format is deployed to satisfy the requirements for a simple and low-cost transceiver configuration. For the seamless and effective connection of such heterogeneous networks without an optical-electrical-optical conversion, an all-optical modulation format conversion technique is required. In this paper, we propose all-optical PAM4 to QPSK and 16QAM modulation format conversions using silicon-rich nitride waveguides. The successful conversions from 50-Gbps-class PAM4 signals to 50-Gbps-class QPSK and 100-Gbps-class 16QAM signals are demonstrated via numerical simulations.

Indoor free space optical (FSO) communication technology that provides high-speed connectivity to edge users is expected to be introduced in the near future mobile communication system, where the silicon photonics solid-state beam scanning device is a promising tool because of its low cost, long-term reliability, and other beneficial properties. However, the current two-dimensional beam scanning devices using grating coupler arrays have difficulty in increasing the transmission capacity because of bandwidth regulation. To solve the problem, we have introduced a broadband surface optical coupler, “elephant coupler,” which has great potential for combining wavelength and spatial division multiplexing technologies into the beam scanning device, as an alternative to grating couplers. The prototype port-selective silicon beam scanning device fabricated using a 300 mm CMOS pilot line achieved broadband optical beam emission with a 1 dB-loss bandwidth of 40 nm and demonstrated beam scanning using an imaging lens. The device has also exhibited free-space signal transmission of non-return-to-zero on-off-keying signals at 10 Gbps over a wide wavelength range of 60 nm. In this paper, we present an overview of the developed beam scanning device. Furthermore, the theoretical design guidelines for indoor mobile FSO communication are discussed.

The optical phased array (OPA) is an emerging non-mechanical device that enables high-speed beam steering by emitting precisely phase-controlled lightwaves from numerous optical antennas. In practice, however, it is challenging to drive all phase shifters on an OPA in a deterministic manner due to the inevitable fabrication-induced phase errors and crosstalk between the phase shifters. In this work, we fabricate a 16-element silicon photonic non-redundant OPA chip with integrated phase monitors and experimentally demonstrate accurate monitoring of the relative phases of light from each optical antenna. Under the beam steering condition, the optical phase retrieved from the on-chip phase monitors varies linearly with the steering angle, as theoretically expected.

We have designed a near-infrared wavelength Si/CaF2 DFB quantum cascade laser and investigated the possibility of single-mode laser oscillation by analysis of the propagation mode, gain, scattering time of Si quantum well, and threshold current density. As the waveguide and resonator, a slab-type waveguide structure with a Si/CaF2 active layer sandwiched by SiO2 on a Si (111) substrate and a grating structure in an n-Si conducting layer were assumed. From the results of optical propagation mode analysis, by assuming a λ/4-shifted bragg waveguide structure, it was found that the single vertical and horizontal TM mode propagation is possible at the designed wavelength of 1.70µm. In addition, a design of the active layer is proposed and its current injection capability is roughly estimated to be 25.1kA/cm2, which is larger than required threshold current density of 1.4kA/cm2 calculated by combining analysis results of the scattering time, population inversion, gain of quantum cascade lasers, and coupling theory of a Bragg waveguide. The results strongly indicate the possibility of single-mode laser oscillation.

This paper summarizes our recent studies on architecture, photonic integration, system validation and networking performance analysis of a flexible low-latency interconnect optical network switch (Flex-LIONS) for datacenter and high-performance computing (HPC) applications. Flex-LIONS leverages the all-to-all wavelength routing property in arrayed waveguide grating routers (AWGRs) combined with microring resonator (MRR)-based add/drop filtering and multi-wavelength spatial switching to enable topology and bandwidth reconfigurability to adapt the interconnection to different traffic profiles. By exploiting the multiple free spectral ranges of AWGRs, it is also possible to provide reconfiguration while maintaining minimum-diameter all-to-all interconnectivity. We report experimental results on the design, fabrication, and system testing of 8×8 silicon photonic (SiPh) Flex-LIONS chips demonstrating error-free all-to-all communication and reconfiguration exploiting different free spectral ranges (FSR0 and FSR1, respectively). After reconfiguration in FSR1, the bandwidth between the selected pair of nodes is increased from 50Gb/s to 125Gb/s while an all interconnectivity at 25Gb/s is maintained using FSR0. Finally, we investigate the use of Flex-LIONS in two different networking scenarios. First, networking simulations for a 256-node datacenter inter-rack communication scenario show the potential latency and energy benefits when using Flex-LIONS for optical reconfiguration based on different traffic profiles (a legacy fat-tree architecture is used for comparison). Second, we demonstrate the benefits of leveraging two FSRs in an 8-node 64-core computing system to provide reconfiguration for the hotspot nodes while maintaining minimum-diameter all-to-all interconnectivity.

Silicon photonics technology is a promising candidate for small form factor transceivers that can be used in data-center applications. This technology has a small footprint, a low fabrication cost, and good temperature immunity. However, its main challenge is due to the high baud rate operation for optical modulators with a low power consumption. This paper investigates an all-Silicon Mach-Zehnder modulator based on the lumped-electrode optical phase shifters. These phase shifters are driven by a complementary metal oxide semiconductor (CMOS) inverter driver to achieve a low power optical transmitter. This architecture improves the power efficiency because an electrical digital-to-analog converter (DAC) and a linear driver are not required. In addition, the current only flows at the time of data transition. For this purpose, we use a PIN-diode phase shifter. These phase shifters have a large capacitance so the driving voltage can be reduced while maintaining an optical phase shift. On the other hand, this study integrates a passive resistance-capacitance (RC) equalizer with a PIN-phase shifter to expand the electro-optic (EO) bandwidth of a modulator. Therefore, the modulation efficiency and the EO bandwidth can be optimized by designing the capacitor of the RC equalizer. This paper reviews the recent progress for the high-speed operation of an all-Si PIN-RC modulator. This study introduces a metal-insulator-metal (MIM) structure for a capacitor with a passive RC equalizer to obtain a wider EO bandwidth. As a result, this investigation achieves an EO bandwidth of 35.7-37 GHz and a 70 Gbaud NRZ operation is confirmed.

We review our research progress of multi-port optical switches based on the silicon photonics platform. Up to now, the maximum port-count is 32 input ports×32 output ports, in which transmissions of all paths were demonstrated. The switch topology is path-independent insertion-loss (PILOSS) which consists of an array of 2×2 element switches and intersections. The switch presented an average fiber-to-fiber insertion loss of 10.8 dB. Moreover, -20-dB crosstalk bandwidth of 14.2 nm was achieved with output-port-exchanged element switches, and an average polarization-dependent loss (PDL) of 3.2 dB was achieved with a non-duplicated polarization-diversity structure enabled by SiN overpass waveguides. In the 8×8 switch, we demonstrated wider than 100-nm bandwidth for less than -30-dB crosstalk with double Mach-Zehnder element switches, and less than 0.5 dB PDL with polarization diversity scheme which consisted of two switch matrices and fiber-type polarization beam splitters. Based on the switch performances described above, we discuss further improvement of switching performances.

A compact silicon photonic crystal waveguide (PCW) slow-light modulator is presented. The proposed modulator is capable of achieving a 64 Gbps bit-rate in a wide operating spectrum. The slow-light enhances the modulation efficiency in proportion to its group index ng. Two types of 200-µm-long PCW modulators are presented. These are low- and high-dispersion devices, which are implemented using a complementary metal-oxide-insulator process. The lattice-shifted PCW achieved low-dispersion slow-light and exhibited ng ≈ 20 with an operating spectrum Δλ ≈ 20 nm, in which the fluctuation of the extinction ratio is ±0.5 dB. The PCW device without the lattice shift exhibited high-dispersion, for which a large or small value of ng can be set on demand by changing the wavelength. It was found that for a large ng, the frequency response was degraded due to the electro-optic phase mismatch between the RF signals and slow-light even for such small-size modulators. Meander-line electrodes, which bypass and delay the RF signals to compensate for the phase mismatch, are proposed. A high cutoff frequency of 55 GHz was theoretically predicted, whereas the experimentally measured value was 38 GHz. A high-quality open eye pattern for a drive voltage of 1 V at 32 Gbps was observed. The clear eye pattern was maintained for 50-64 Gbps, although the drive voltage increased to 3.5-5.3 V. A preliminary operation of a 2-bits pulse amplitude modulation up to 100 Gbps was also attempted.

We report our recent progress in silicon photonics integrated device technology targeting on-chip-level large-capacity optical interconnect applications. To realize high-capacity data transmission, we successfully developed on-package-type silicon photonics integrated transceivers and demonstrated simultaneous 400 Gbps operation. 56 Gbps pulse-amplitude-modulation (PAM) 4 and wavelength-division-multiplexing technologies were also introduced to enhance the transmission capacity.

To address the bandwidth bottleneck that exists between LSI chips, we have proposed a novel, high-sensitivity receiver circuit for differential optical transmission on a silicon optical interposer. Both anodes and cathodes of the differential photodiodes (PDs) were designed to be connected to a transimpedance amplifier (TIA) through coupling capacitors. Reverse bias voltage was applied to each of the differential PDs through load resistance. The proposed receiver circuit achieved double the current signal amplitude of conventional differential receiver circuits. The frequency response of the receiver circuit was analyzed using its equivalent circuit, wherein the temperature dependence of the PD was implemented. The optimal load resistances of the PDs were determined to be 5kΩ by considering the tradeoff between the frequency response and bias voltage drop. A small dark current of the PD was important to reduce the voltage drop, but the bandwidth degradation was negligible if the dark current at room temperature was below 1µA. The proposed circuit achieved 3-dB bandwidths of 18.9 GHz at 25°C and 13.7 GHz at 85°C. Clear eye openings in the TIA output waveforms for 25-Gbps 27-1 pseudorandom binary sequence signals were obtained at both temperatures.

Optical I/O core based on silicon photonics technology and optical/electrical assembly was developed as a fingertip-size optical module with high bandwidth density, low power consumption, and high temperature operation. The advantages of the optical I/O core, including hybrid integration of quantum dot laser diode and optical pin, allow us to achieve 300-m transmission at 25Gbps per channel when optical I/O core is mounted around field-programmable gate array without clock data recovery.

We present dynamic mode switching characteristic by using a 2 × 2 optical mode switch based on silicon waveguide. The configuration of optical mode switch is similar to MZI where the width of input and output ports are designed to permit the combining of the fundamental mode and the first order mode. We designed the symmetrical arms with phase shifter based on p-i-n structure in one arm to generate a π-phase difference between each arm. As a result, mode switching with the injection current of 60mA (5.7V) was successfully achieved with the mode crosstalk of -10dB at λ=1550nm. A minimum of less than 60ns and 40ns mode switching time for the fundamental mode to first order mode and first order mode to fundamental mode, was achieved respectively in this time.

We have developed membrane distributed Bragg reflector (DBR) lasers on thermally oxidized Si substrate (SiO2/Si substrate) to evaluate the parameters of the on-Si lasers we have been developing. The lasers have InGaAsP-based multi-quantum wells (MQWs) grown on InP substrate. We used direct bonding to transfer this active epitaxial layer to SiO2/Si substrate, followed by epitaxial growth of InP to fabricate a buried-heterostructure (BH) on Si. The lateral p-i-n structure was formed by thermal diffusion of Zn and ion implantation of Si. For the purpose of evaluating laser parameters such as internal quantum efficiency and internal loss, we fabricated long-cavity lasers that have 200- to 600-µm-long active regions. The fabricated DBR lasers exhibit threshold currents of 1.7, 2.1, 2.8, and 3.7mA for active-region lengths of 200, 300, 400, and 600µm, respectively. The differential quantum efficiency also depends on active-region length. In addition, the laser characteristics depend on the distance between active region and p-doped region. We evaluated the internal loss to be 10.2cm-1 and internal quantum efficiency to be 32.4% with appropriate doping profile.

We have proposed and demonstrated the principle of optical mode switch. However, the crosstalk between modes has not yet reported due to the difficulty of mode recognition and distinction. To accomplish this mode crosstalk evaluation, we integrated multimode interference (MMI) mode filter with the optical mode switch in this work. As a result, for the both TE and TM modes, the crosstalk of approximately -10 dB has been evaluated experimentally.

We provide an overview of techniques for the photonic generation of arbitrary RF waveforms, particularly those suitable for impulse radio or multi-band ultrawideband (UWB)-over-fiber transmission, and chirped microwave waveforms, with an emphasis on microwave photonic filtering and optical spectral shaping followed by wavelength-to-time mapping. We discuss possibilities for integrating the various device and component technologies with silicon photonics.

This paper covers new architectures, technologies, and performance benchmarking together with prospects for high productivity and high performance computing enabled by photonics. The exponential and sustained increases in computing and data center needs are driving the demands for exascale computing in the future. Power-efficient and parallel computing with balanced system design is essential for reaching that goal as should support ∼billion total concurrencies and ∼billion core interconnections with ∼exabyte/second bisection bandwidth. Photonic interconnects offer a disruptive technology solution that fundamentally changes the computing architectural design considerations. Optics provide ultra-high throughput, massive parallelism, minimal access latencies, and low power dissipation that remains independent of capacity and distance. In addition to the energy efficiency and many of the fundamental physical problems, optics will bring high productivity computing where programmers can ignore locality between billions of processors and memory where data resides. Repeaterless interconnection links across the entire computing system and all-to-all massively parallel interconnection switch will significantly transform not only the hardware aspects of computing but the way people program and harness the computing capability. This impacts programmability and productivity of computing. Benchmarking and optimization of the configuration of the computing system is very important. Practical and scalable deployment of photonic interconnected computing systems are likely to be aided by emergence of athermal silicon photonics and hybrid integration technologies.

Graphene is attracting attention in electrical and optical research fields recently. We measured the optical absorption characteristics and polarization dependence of single-layer graphene (SLG) on sub-micrometer Si waveguide. The results for graphene lengths ranging from 2.5 to 200 $mu$ m reveal that the optical absorption by graphene is 0.09 dB/$mu$ m with the TE mode and 0.05 dB/$mu$ m with the TM mode. The absorption in the TE mode is 1.8 times higher than that in the TM mode. An optical spectrum, theoretical analysis and Raman spectrum indicate that surface-plasmon polaritons in graphene support TM mode light propagation.

There is a relentless push for cost and size reduction in optical transmitters and receivers for fiber-optic links. Monolithically integrated optical chips in InP and Si may be a way to leap ahead of this trend. We discuss uses of integration technology to accomplish various telecommunications functions.