Side-channel (SC) leakage from a cryptographic device chip is simulated as the dynamic current flowing out of the chip. When evaluating the simulated current, an evaluation by comparison with an actual measurement is essential; however, it is difficult to compare them directly. This is because a measured waveform is typically the output voltage of probe placed at the observation position outside the chip, and the actual dynamic current is modified by several transfer impedances. Therefore, in this paper, the probe voltage is converted into the dynamic current by using an EMC macro-model of a cryptographic device being evaluated. This paper shows that both the amplitude and the SC analysis (correlation power analysis and measurements to disclosure) results of the simulated dynamic current were evaluated appropriately by using the EMC macro-model. An evaluation confirms that the shape of the simulated current matches the measured one; moreover, the SC analysis results agreed with the measured ones well. On the basis of the results, it is confirmed that a register-transfer level (RTL) simulation of the dynamic current gives a reasonable estimation of SC traces.

Two structural coverage criteria, toggle coverage and modified condition/decision coverage, for FBD (Function Block Diagram) simulation are proposed in the previous study. This paper empirically evaluates how effective the coverage criteria are to detect faults in an FBD program using the mutation analysis.

According to the aging society, it is getting more important for software industry to secure human resources including senior developers. To enhance the performance of senior developers, we should clarify the strengths and weaknesses of senior developers, and based on that, we should reconsider software engineering education and development support tools. To a greater or lesser extent, many cognitive abilities would be affected by aging, and we focus on the human memory as one of such abilities. We performed preliminary analysis based on the assumption. In the preliminary experiment, we prepared programs in which the influence of human memory performance (i.e., the number of variables remembered in the short-term memory) on reading speed is different, and measured time for subjects to understand the programs. As a result, we observed that the code reading speed of senior subjects was slow, when they read programs in which the influence of human memory performance is larger.

This paper demonstrates how to achieve simulation-based strong attribute hiding against adaptive adversaries for predicate encryption (PE) schemes supporting expressive predicate families under standard computational assumptions in bilinear groups. Our main result is a simulation-based adaptively strongly partially-hiding PE (PHPE) scheme for predicates computing arithmetic branching programs (ABP) on public attributes, followed by an inner-product predicate on private attributes. This simultaneously generalizes attribute-based encryption (ABE) for boolean formulas and ABP's as well as strongly attribute-hiding PE schemes for inner products. The proposed scheme is proven secure for any a priori bounded number of ciphertexts and an unbounded (polynomial) number of decryption keys, which is the best possible in the simulation-based adaptive security framework. This directly implies that our construction also achieves indistinguishability-based strongly partially-hiding security against adversaries requesting an unbounded (polynomial) number of ciphertexts and decryption keys. The security of the proposed scheme is derived under (asymmetric version of) the well-studied decisional linear (DLIN) assumption. Our work resolves an open problem posed by Wee in TCC 2017, where his result was limited to the semi-adaptive setting. Moreover, our result advances the current state of the art in both the fields of simulation-based and indistinguishability-based strongly attribute-hiding PE schemes. Our main technical contribution lies in extending the strong attribute hiding methodology of Okamoto and Takashima [EUROCRYPT 2012, ASIACRYPT 2012] to the framework of simulation-based security and beyond inner products.

In this study, simulations are performed to design an optimal device for thinning the GaN channel layer on the semi-insulating layer in HEMT. When the gate length is 50nm, the thickness of the undoped channel must be thinner than 300nm to observe the off state. When the GaN channel layer is an Fe-doped, an on/off ratio of ~300 can be achieved even with a gate length of 25nm, although the transconductance is slightly reduced.

A method for estimating circuit performance variation caused by packaging-induced mechanical stress is proposed. The developed method is based on the stress distribution chart for the target integrated circuit (IC) and the stress sensitivity characteristics of individual devices. This information is experimentally obtained using a specially designed test chip and a cantilever bending calibration system. A post-packaging analysis and simulation tool, called Stress Netlist Generator (SNG), is developed for conducting the proposed method. Based on the stress distribution chart and the stress sensitivity characteristics, SNG modifies the SPICE model parameters in the target netlist according to the impact of the packaging-induced stress. The netlist generated by SNG is used to estimate packaging-induced performance variation with high accuracy. The developed method is remarkably effective even for small-scale ICs with chip sizes of roughly 1 mm2, such as power management ICs, which require higher precision.

This paper presents a methodology with which to construct an equivalent simulation model of closed-loop BCI testing for a vehicle component. The proposed model comprehensively takes the transfer impedance of the test configuration into account. The methodology used in this paper relies on circuit modeling and EM modeling as well. The BCI test probes are modeled as the equivalent circuits, and the frequency-dependent losses characteristics in the probe's ferrite are derived using a PSO algorithm. The measurement environments involving the harness cable, load simulator, DUT, and ground plane are designed through three-dimensional EM simulation. The developed circuit model and EM model are completely integrated in a commercial EM simulation tool, EMC Studio of EMCoS Ltd. The simulated results are validated through comparison with measurements. The simulated and measurement results are consistent in the range of 1MHz up to 400MHz.

Cross sections that cause single event upsets by heavy ions are sensitive to doping concentration in the source and drain regions, and the structure of the raised source and drain regions especially in FDSOI. Due to the parasitic bipolar effect (PBE), radiation-hardened flip flops with stacked transistors in FDSOI tend to have soft errors, which is consistent with measurement results by heavy-ion irradiation. Device-simulation results in this study show that the cross section is proportional to the silicon thickness of the raised layer and inversely proportional to the doping concentration in the drain. Increasing the doping concentration in the source and drain region enhance the Auger recombination of carriers there and suppresses the parasitic bipolar effect. PBE is also suppressed by decreasing the silicon thickness of the raised layer. Cgg-Vgs and Ids-Vgs characteristics change smaller than soft error tolerance change. Soft error tolerance can be effectively optimized by using these two determinants with only a small impact on transistor characteristics.

Most of latency-sensitive mobile applications depend on computational resources provided by a cloud computing service. The problem of relying on cloud computing is that, sometimes, the physical locations of cloud servers are distant from mobile users and the communication latency is long. As a result, the concept of distributed cloud service, called mobile edge computing (MEC), is being introduced in the 5G network. However, MEC can reduce only the communication latency. The computing latency in MEC must also be considered to satisfy the required total latency of services. In this research, we study the impact of both latencies in MEC architecture with regard to latency-sensitive services. We also consider a centralized model, in which we use a controller to manage flows between users and mobile edge resources to analyze MEC in a practical architecture. Simulations show that the interval and controller latency trigger some blocking and error in the system. However, the permissive system which relaxes latency constraints and chooses an edge server by the lowest total latency can improve the system performance impressively.

Since first introduced in 2008 with the 1.0 specification, OpenCL has steadily evolved over the decade to increase its support for heterogeneous parallel systems. In this paper, we accelerate stochastic simulation of biochemical reaction networks on modern GPUs (graphics processing units) by means of the OpenCL programming language. In implementing the OpenCL version of the stochastic simulation algorithm, we carefully apply its data-parallel execution model to optimize the performance provided by the underlying hardware parallelism of the modern GPUs. To evaluate our OpenCL implementation of the stochastic simulation algorithm, we perform a comparative analysis in terms of the performance using the CPU-based cluster implementation and the NVidia CUDA implementation. In addition to the initial report on the performance of OpenCL on GPUs, we also discuss applicability and programmability of OpenCL in the context of GPU-based scientific computing.

The electromagnetic interference (EMI) generated by power electronic converters is largely influenced by parasitic inductances and capacitances of the converter. One of the most popular EMI simulation methods that can take account of the parasitic parameters is the three-dimensional electromagnetic simulation by finite element method (FEM). A noise-source model should be given in the frequency domain in comprehensive FEM simulations. However, the internal impedance of the noise source is static in the frequency domain, whereas the transient switching of a power semiconductor changes its internal resistance in the time domain. In this paper, we propose the use of a voltage-source noise model and a current-source noise model to simulate EMI noise with the two components of voltage-dependent noise and current-dependent noise in the frequency domain. In order to simulate voltage-dependent EMI noise, we model the power semiconductor that is turning on by a voltage source, whose internal impedance is low. The voltage-source noise is proportional to the amplitude of the voltage. In order to simulate current-dependent EMI noise, we model the power semiconductor that is turning off by a current source, whose internal impedance is large. The current-source noise is proportional to the amplitude of the current. The measured and simulated conducted EMI agreed very well.

We present an OpenACC-based parallelization implementation of stochastic algorithms for simulating biochemical reaction networks on modern GPUs (graphics processing units). To investigate the effectiveness of using OpenACC for leveraging the massive hardware parallelism of the GPU architecture, we carefully apply OpenACC's language constructs and mechanisms to implementing a parallel version of stochastic simulation algorithms on the GPU. Using our OpenACC implementation in comparison to both the NVidia CUDA and the CPU-based implementations, we report our initial experiences on OpenACC's performance and programming productivity in the context of GPU-accelerated scientific computing.

Since the hardware resource of a single FPGA is limited, one idea to scale the performance of FPGA-based HPC applications is to expand the design space with multiple FPGAs. This paper presents a scalable architecture of a deeply pipelined stream computing platform, where available parallelism and inter-FPGA link characteristics are investigated to achieve a scaled performance. For a practical exploration of this vast design space, a performance model is presented and verified with the evaluation of a tsunami simulation application implemented on Intel Arria 10 FPGAs. Finally, scalability analysis is performed, where speedup is achieved when increasing the computing pipeline over multiple FPGAs while maintaining the problem size of computation. Performance is scaled with multiple FPGAs; however, performance degradation occurs with insufficient available bandwidth and large pipeline overhead brought by inadequate data stream size. Tsunami simulation results show that the highest scaled performance for 8 cascaded Arria 10 FPGAs is achieved with a single pipeline of 5 stream processing elements (SPEs), which obtained a scaled performance of 2.5 TFlops and a parallel efficiency of 98%, indicating the strong scalability of the multi-FPGA stream computing platform.

State-of-the-art parallel systems employ a huge number of computing nodes that are connected by an interconnection network. An interconnection network (ICN) plays an important role in a parallel system, since it is responsible to communication capability. In general, an ICN shows non-linear phenomena in its communication performance, most of them are caused by congestion. Thus, designing a large-scale parallel system requires sufficient discussions through repetitive simulation runs. This causes another problem in simulating large-scale systems within a reasonable cost. This paper shows a promising solution by introducing the cellular automata concept, which is originated in our prior work. Assuming 2D-torus topologies for simplification of discussion, this paper discusses fundamental design of router functions in terms of cellular automata, data structure of packets, alternative modeling of a router function, and miscellaneous optimization. The proposed models have a good affinity to GPGPU technology and, as representative speed-up results, the GPU-based simulator accelerates simulation upto about 1264 times from sequential execution on a single CPU. Furthermore, since the proposed models are applicable in the shared memory model, multithread implementation of the proposed methods achieve about 162 times speed-ups at the maximum.

In GNSS (Global Navigation Satellite System) Distributed Simulation Environment (GDSE), the simulation task could be designed with the sharing models on the Internet. However, too much information and relation of model need to be managed in GDSE. Especially if there is a large quantity of sharing models, the model retrieval would be an extremely complex project. For meeting management demand of GDSE and improving the model retrieval efficiency, the characteristics of service simulation model are analysed firstly. A semantic management method of simulation model is proposed, and a model management architecture is designed. Compared with traditional retrieval way, it takes less retrieval time and has a higher accuracy result. The simulation results show that retrieval in the semantic management module has a good ability on understanding user needs, and helps user obtain appropriate model rapidly. It improves the efficiency of simulation tasks design.

Reverberation chambers (RCs) are used widely in the electromagnetic measurement area. An RC is designed to have a long reverberation time, generate numerous modes, and provide good field uniformity within the chamber. The purpose of this paper is to describe the design process and measurement of the KRISS Reverberation Chamber (KRC). KRC models with 4.5m × 3.4m × 2.8m dimensions are simulated by 3D numerical simulation software. The field uniformity and correlation coefficient are then analyzed at 200MHz to obtain the optimized model. The simulation results show good performance in terms of field uniformity and are confirmed by measurement from 200MHz to 1GHz. The lowest usable frequency (LUF) of KRC was confirmed by field uniformity to be 200MHz. However, the stirrer correlation coefficient results show good performance above 300MHz.

We numerically simulated electrical properties, i.e., the resistance and Coulomb blockade threshold, of randomly-placed conductive nanoparticles. In simulation, tunnel junctions were assumed to be formed between neighboring particle-particle and particle-electrode connections. On a plane of triangle 100×100 grids, three electrodes, the drain, source, and gate, were defined. After random placements of conductive particles, the connection between the drain and source electrodes were evaluated with keeping the gate electrode disconnected. The resistance was obtained by use of a SPICE-like simulator, whereas the Coulomb blockade threshold was determined from the current-voltage characteristics simulated using a Monte-Carlo simulator. Strong linear correlation between the resistance and threshold voltage was confirmed, which agreed with results for uniform one-dimensional arrays.

An equivalent circuit of Yee's cells is proposed for mixed electromagnetic and circuit simulations. Using the equivalent circuit, a mixed electromagnetic and circuit simulator can be developed, in which the electromagnetic field and circuit responses are simultaneously analyzed. Representing the electromagnetic system as a circuit, active and passive device models in a circuit simulator can be used for the mixed simulations without any modifications. Hence, the propose method is very useful for designing various electronic systems. To evaluate the mixed simulations with the equivalent circuit, two implementations with shared or distributed memory computer system are presented. In the numerical examples, we evaluate the performances of the prototype simulators to demonstrate the effectiveness.

With the evolution of autonomous distributed systems such as smart cities, autonomous vehicles, smart control and scheduling systems there is an increased need for approaches to manage the execution of services to deliver real-time performance. As Cloud-hosted services are increasingly used to provide intelligence and analytic functionality to Internet of Things (IoT) systems, Quality of Service (QoS) techniques must be used to guarantee the timely service delivery. This paper reviews state-of-the-art QoS and Cloud techniques for real-time service delivery and data analysis. A review of straggler mitigation and a classification of real-time QoS techniques is provided. Then a mathematical framework is presented capturing the relationship between the host execution environment and the executing service allowing the response-times to predicted throughout execution. The framework is shown experimentally to reduce the number of QoS violations by 21% and provides alerts during the first 14ms provide alerts for 94% of future violations.

During a disaster, users will not be able to communicate with their families and friends using mobile terminals, e.g., smartphones, in many cases due to failures of base stations and backhaul of cellular networks. Even when cellular networks normally operate without failure, they will become seriously congested due to dramatically increased traffic demand. To solve these problems, device-to-device (D2D) communications, in which mobile terminals directly communicate without cellular networks, have been investigated. Multi-hop D2D communication using multiple mobile terminals as relay nodes will be effective in maintaining connectivity during a disaster. It is preferable to estimate the success probability of multi-hop D2D communication by using a simple method that offers optimal parameter control, e.g., the ratio of mobile terminals using D2D communications and the maximum hop length. Moreover, when evaluating the reachability of multi-hop D2D communication, we need to consider the evacuation behavior during a disaster because success probability depends on the geographical distribution of mobile terminals. Therefore, in this paper, we derive a formula for estimating the success probability of multi-hop D2D communication in a simple manner and analyze its reachability using a multi-agent simulation that reproduces the evacuation behavior expected during an earthquake in Tokyo Shinjuku Ward.