This paper proposes a new distortion analysis method for frequency-dependent FET amplifiers, which uses a novel Frequency-Dependent Complex Power Series (FDCPS) model. This model consists of a frequency-independent nonlinear amplifier represented by an odd-order complex power series and frequency-dependent input and output filters. The in-band frequency characteristics of the saturation region are represented by the frequency-dependent output filter, while the in-band frequency characteristics of the linear region are represented by the frequency-dependent input and output filters. In this method, the time-domain analysis is carried out to calculate the frequency-independent nonlinear amplifier characteristics, and the frequency-domain analysis is applied to calculate the frequency-dependent input and output filter characteristics. The third-order intermodulation (IM3) calculated by this method for a GaAs MESFET amplifier is in good agreement with the numerical results obtained by the Harmonic Balance (HB) method. Moreover, the IM3 calculated by this method also agrees well with the measured data for an L-band 3-stage GaAs MESFET amplifier. It is shown that this method is effective for calculating frequency-dependent distortion of a nonlinear amplifier with broadband modulation signals.

A large-signal simulation program for multi-stage power amplifier modules by using a novel interpolation is presented. This simulation program has the function to make the Load-Pull and Source-Pull (LP/SP) data required for the simulation. By using the interpolation, a lot of LP/SP data can be made from a small number of measured LP/SP data. The interpolation is based on the calculation method using a two-dimensional function. By using the simulation program, we can calculate the large-signal characteristics depended on frequency and temperature of the multi-stage amplifier module. We apply the simulation program to the design of the amplifier. The calculated and measured results agree well. The accuracy of the presented interpolation is confirmed. It is considered that the presented program is useful to calculate large-signal characteristics of the amplifier module.

An 18 GHz-band Microwave Monolithic Integrated Circuit (MMIC) diode linearizer using a parallel capacitor with a bias feed resistance is presented. The newly employed parallel capacitor is able to control gain and phase deviations of the linearizer. This implies that the gain deviation of the linearizer can be controlled without changing the phase deviation. The presented linearizer can compensate the distortion of an amplifier sufficiently. The operation principle of the linearizer with the parallel capacitor is investigated. It is clarified that the gain deviation can be adjusted without changing the phase deviation by using the parallel capacitor. Two variable gain buffer amplifiers and the core part of the linearizer which consists of a diode, a bias feed resistor, and a capacitor are fabricated on the MMIC chip. The amplifiers cancel the frequency dependence of the core part of the linearizer to improve bandwidth of the MMIC. Further, the amplifiers contribute to earn low reflection and compensate insertion loss of the linearizer. The MMIC chip is size of 2.5 mm 1 mm. The linearizer has demonstrated improvement of 3rd Inter-Modulation Distortion (IMD3) of 12 dB at 18 GHz and improvement of more than 6 dB between 17.8 GHz and 18.6 GHz.

This paper describes the design, fabrication, and performance of a GaAs FET linearizer with a large source inductance, focusing mainly on (a) a mechanism of positive gain and negative phase deviations for input power, (b) stability considerations, and (c) a dependence on load impedance. In addition, in an application to the linearized amplifier, it is shown that an improvement can be achieved for adjacent channel leakage power (ACP) and third order intermodulation distortion (IM3) with the use of the linearizer.

This paper presents a digital predistorter with a wideband memory effect compensator for a Doherty power amplifier (PA). A simple memory-predistortion model, which consists of a look-up-table (LUT) and an adaptive filter equalizing memory effects, and a new memory effect estimation algorithm using a direct-learning architecture are proposed. The proposed estimation algorithm has an advantage that a transfer function of a feedback circuit does not affect the learning process. The predistorter is implemented in a field programmable gate array (FPGA) and a digital signal processor (DSP). The transmitter has achieved distortion level of -50.8 dBr at signal bandwidth away from the carrier, and PA module efficiency of 24% with output power of 43 dBm at 2595 MHz under a 20 MHz-bandwidth orthogonal frequency division multiplexing (OFDM) signal using laterally diffused metal oxide semiconductor (LDMOS) FETs.

A high directivity microstrip coupler suppressing leak coupling with a cancellation circuit of a Wilkinson divider is presented. The presented coupler utilizes a cancellation circuit between a coupling port and an isolation port of the conventional microstrip coupler to enhance the isolation. The cancellation circuit consists of the Wilkinson divider, the multistage attenuator, and the phase offset line. The frequency to enhance the isolation is controlled by the attenuators. As the directivity is improved without the modification of the conventional coupler, the cancellation circuit can be applied to the fabricated conventional couplers. The measured directivity of the presented 1/18 λ coupler is improved from 4.8 dB to 43.0 dB at 2.6 GHz, compared with the conventional 1/4 λ coupler with -20 dB coupling. Simultaneously, the 27.4% relative bandwidth with the 20 dB directivity is achieved.