This paper describes the design methodology of a low dropout regulator (LDO). It was used to develop a power management sub-system IC for CDMA handsets which is also described in this paper. This IC contains 11 LDOs, bandgap reference, battery charger, control logic and some other peripheral circuits. For CDMA applications, very small ground current in the order of µA in standby mode is required for LDOs. An LDO architecture to meet this requirement and achieve stable operation over the process variation was developed. The on-chip logic efficiently controls all LDOs and battery charger to reduce the power dissipation as much as possible. This mixed signal subsystem has been implemented in the in-house 0.6-µm BCDMOS process. The very low LDO ground current down to 3 µA has been achieved with stable operation.
Young-Seok PARK Pyung-Su HAN Woo-Young CHOI
A linear model for feedforward ring oscillators (FROs) is developed and oscillator characteristics are analyzed using the model. The model allows prediction of multiple oscillation modes as well as the oscillation frequency of each mode. The prediction agrees well with SPICE simulation results.
Based on the theoretical analysis of literature, saturation in measured signal of active noise control (ANC) systems will degrade the convergence speed. However, the experiments show that the saturated input signal can speed up the convergence of the narrow-band ANC systems. This paper intends to remodel the saturation effects for feedforward and feedback ANC systems. Combining the action of analog-to-digital converters (ADC), the mathematical expression and block diagrams are proposed to model the saturation effects in the practical ANC systems. The derivation and simulation results show that since the saturation is able to amplify the principle component of signal, the convergence would be speeded up.
Xin YIN Johan BAUWELINCK Tine DE RIDDER Peter OSSIEUR Xing-Zhi QIU Jan VANDEWEGE Olivier CHASLES Arnaud DEVOS Piet DE PAUW
We propose a novel 50 Mb/s optical transmitter fabricated in a 0.6 µm BiCMOS technology for automotive applications. The proposed VCSEL driver chip was designed to operate with a single supply voltage ranging from 3.0 V to 5.25 V. A fully integrated feedforward current control circuit is presented to stabilize the optical output power without any external components. The experimental results show that the optical output power can be stable within a 1.1 dB range and the extinction ratio greater than 14 dB over the automotive environmental temperature range of -40 to 105.
Complex bandpass ΔΣAD modulators can provide superior performance to a pair of real bandpass ΔΣAD modulators of the same order. They process just input I and Q signals, not image signals, and AD conversion can be realized with low power dissipation, so that they are desirable for such low-IF receiver applications. This paper proposes a new architecture for complex bandpass Δ ΣAD modulators with cross-noise-coupled topology, which effectively raises the order of the complex modulator and achieves higher SQNDR (Signal to Quantization Noise and Distortion Ratio) with low power dissipation. By providing the cross-coupled quantization noise injection to internal I and Q paths, noise coupling between two quantizers can be realized in complex form, which enhances the order of noise shaping in complex domain, and provides a higher-order NTF using a lower-order loop filter in the complex ΔΣAD modulator. Proposed higher-order modulator can be realized just by adding some passive capacitors and switches, the additional integrator circuit composed of an operational amplifier is not necessary, and the performance of the complex modulator can be effectively raised without more power dissipation. We have performed simulation with MATLAB to verify the effectiveness of the proposed architecture. The simulation results show that the proposed architecture can achieve the realization of higher-order enhancement, and improve SQNDR of the complex bandpass ΔΣAD modulator.
The single-hidden-layer feedforward neural networks (SLFNs) are frequently used in machine learning due to their ability which can form boundaries with arbitrary shapes if the activation function of hidden units is chosen properly. Most learning algorithms for the neural networks based on gradient descent are still slow because of the many learning steps. Recently, a learning algorithm called extreme learning machine (ELM) has been proposed for training SLFNs to overcome this problem. It randomly chooses the input weights and hidden-layer biases, and analytically determines the output weights by the matrix inverse operation. This algorithm can achieve good generalization performance with high learning speed in many applications. However, this algorithm often requires a large number of hidden units and takes long time for classification of new observations. In this paper, a new approach for training SLFNs called least-squares extreme learning machine (LS-ELM) is proposed. Unlike the gradient descent-based algorithms and the ELM, our approach analytically determines the input weights, hidden-layer biases and output weights based on linear models. For training with a large number of input patterns, an online training scheme with sub-blocks of the training set is also introduced. Experimental results for real applications show that our proposed algorithm offers high classification accuracy with a smaller number of hidden units and extremely high speed in both learning and testing.
Hao SAN Hajime KONAGAYA Feng XU Atsushi MOTOZAWA Haruo KOBAYASHI Kazumasa ANDO Hiroshi YOSHIDA Chieto MURAYAMA Kanichi MIYAZAWA
This paper proposes novel feedforward architecture of the second-order multibit ΔΣAD modulator with single DAC-feedback topology. The ΔΣAD modulator realizes high resolution by oversampling and noise shaping techniques. However, its SNDR (Signal to Noise and Distortion Ratio) is limited by the dynamic range of the input signal and non-idealities of circuit building blocks, particularly by the harmonic distortion in amplifier circuits. A full feedforward ΔΣAD modulator structure has the signal transfer function of unity under ideal circumstances, which means that the signal swings through the loop filter become smaller compared with a feedbacked ΔΣAD modulator. Therefore, the harmonic distortion generated inside the loop filter can be significantly reduced in the feedforward structure because the effect of non-idealities in amplifiers can be suppressed when signal swing is small. Moreover, the reduction of the internal signal swings also relaxes output swing requirements for amplifiers with low supply voltage. However, in conventional feedforward ΔΣAD modulator, an analog adder is needed before quantizer, and especially in a multibit modulator, an additional amplifier is necessary to realize the summation of feedforward signals, which leads to extra chip area and power dissipation. In this paper, we propose a novel architecture of a feedforward ΔΣAD modulator which realizes the summation of feedforward signals without additional amplifier. The proposed architecture is functionally equivalent to the conventional one but with smaller chip area and lower power dissipation. We conducted MATLAB and SPICE simulations to validate the proposed architecture and modulator circuits.
Takeshi UENO Tomohiko ITO Daisuke KUROSE Takafumi YAMAJI Tetsuro ITAKURA
This paper describes 10-bit, 80-MSample/s pipelined A/D converters for wireless-communication terminals. To reduce power consumption, we employed the I/Q amplifier sharing technique [1] in which an amplifier is used for both I and Q channels. In addition, common-source, pseudo-differential (PD) amplifiers are used in all the conversion stages for further power reduction. Common-mode disturbances are removed by the proposed common-mode feedforward (CMFF) technique without using fully differential (FD) amplifiers. The converter was implemented in a 90-nm CMOS technology, and it consumes only 24 mW/ch from a 1.2-V power supply. The measured SNR and SNDR are 58.6 dB and 52.2 dB, respectively.
Mikyung KANG Dong-In KANG Jinwoo SUH Junghoon LEE
This paper proposes a low power real-time packet scheduling scheme that reduces power consumption and network errors on wireless local area networks. The proposed scheme is based on the dynamic modulation scheme which can scale the number of bits per symbol when time slots are unused, and the reclaiming scheme which can switch the primary polling schedule when a specific station falls into a bad state. Built on top of the EDF scheduling policy, the proposed scheme enhances the power performance without violating the constraints of subsequent real-time streams. The simulation results show that the proposed scheme enhances success ratio and reduces power consumption.
Phanumas KHUMSAT Apisak WORAPISHET
A compact OTA suitable for low-voltage active-RC and MOSFET-C filters is presented. The input stage of the OTA utilises the NMOS pseudo-differential amplifier with PMOS active load. The output stage relies upon the dual-mode feed-forward class-AB technique (based on an inverter-type transconductor) with common-mode rejection capability that incurs no penalty on transconductance/bias-current efficiency. Simulation results of a 0.5-V 100-kHz 5th-order Chebyshev filter based on the proposed OTA in a 0.18 µm CMOS process indicate SNR and SFDR of 68 dB and 63 dB (at 50 kHz+55 kHz) respectively. The filter consumes total power consumption of 60 µW.
In this letter, we consider a class of approximately feedback linearized systems that contain both triangular and feedforward forms. With a utilization of the transformation scaling factor, we analytically show that the considered system can be globally exponentially stabilized, globally bounded, or locally stabilized depending on the shapes of triangular and feedforward forms. Our new method broadens a class of nonlinear systems under consideration over the existing results.
Toru NAKURA Makoto IKEDA Kunihiro ASADA
This paper demonstrates a feedforward active substrate noise cancelling technique using a power supply di/dt detector. Since the substrate is usually tied with the ground line with a low impedance, the substrate noise is closely related to the ground bounce which is proportional to the di/dt when inductance is dominant on the ground line impedance. Our active cancelling detects the di/dt of the power supply, and injects an anti-phase current into the substrate so that the di/dt-proportional substrate noise is cancelled out. Our first trial shows that 34% substrate noise reduction is achieved on our test circuit, and the theoretical analysis shows that the optimized canceller design will enhance the substrate noise suppression ratio up to 56%.
Shinya KAWADA Yasuhiro SUGIMOTO
This paper describes a method of extending the signal frequency bandwidth while increasing the stability of a CMOS transimpedance amplifier (TIA). The TIA consists of three inverting amplifiers in a series, and a high-pass filter plus a non-inverting amplifier that are connected to the last two inverting amplifiers stated above in parallel. The TIA is fabricated using a 0.35 µm CMOS process and realizes stable conversion of 60-dBΩ from the photodiode current to the output voltage with more than 500 MHz of signal frequency bandwidth and 60 mW of power consumption from a 3.3 V supply voltage.
Kenichi HORIGUCHI Atsushi OKAMURA Masatoshi NAKAYAMA Yukio IKEDA Tadashi TAKAGI Osami ISHIDA
Weight divided adaptive control method for a microwave FeedForward Power Amplifier (FFPA) is presented. In this adaptive controller, an output signal of a power amplifier is used as reference signal. Additionally, reference signal is divided by the weight of adaptive filter, so that characteristics of the power amplifier, such as temperature dependence, do not have influence on the convergence performances. The proposed adaptive algorithm and the convergence condition are derived analytically and we clarify that the proposed weight divided adaptive algorithm is more stable than the conventional Normalized Least Mean Square (NLMS) algorithm. Then, the convergence condition considering phase calibration error is discussed. The effectiveness of the proposed algorithm are also verified by the nonlinear simulations of the FFPA having AM-AM and AM-PM nonlinearity of GaAsFET.
Young I. SON Hyungbo SHIM Nam H. JO Jin H. SEO
Passification of a non-square linear system is considered by using a parallel feedforward compensator (PFC) and a squaring gain matrix. In contrast to the previous result, a technical assumption is removed by modifying the structure of the PFC. As a result, the broader class of non-square systems can be made passive by the proposed design method. Using the static output feedback (SOF) algorithms, the input-dimensional PFC and the squaring matrix can be designed systematically. The effectiveness of the proposed method is illustrated by practical system examples in the control literature.
Kensaku FUJII Shigeyuki HASHIMOTO Mitsuji MUNEYASU
This paper presents a frequency domain simultaneous equations method capable of automatically recovering noise reduction effect degraded by secondary path changes. The simultaneous equations method has been studied, first in time domain. Accordingly to the study, in the time domain, the simultaneous equations method requires an additional filter and a system identification circuit used for transforming the solution of the simultaneous equations into the coefficients of noise control filter, which increase the processing cost. To reduce the processing cost, this paper studies on the application of a frequency domain processing technique, the cross spectrum method, to the simultaneous equations method. By directly applying the equation defining the cross spectrum method to the solution, the additional filter becomes unnecessary. In addition, the system identification circuit is replaced with the inverse Fourier transform. Thereby, the processing cost drastically decreases. This paper also presents simulation results to confirm that the proposed method can automatically recover the noise reduction effect degraded by a path change and provides much higher convergence speed than that of the filtered-x NLMS algorithm with the perfectly modeled secondary path filter.
Kenichi HORIGUCHI Masatoshi NAKAYAMA Yuji SAKAI Kazuyuki TOTANI Haruyasu SENDA Yukio IKEDA Tadashi TAKAGI Osami ISHIDA
A high efficiency feedforward power amplifier (FFPA) with a series diode linearizer for cellular base stations is presented. In order to achieve the highest overall efficiency of an FFPA, an improved pre-distortion diode linearizer has been used and the bias condition of the main amplifier has been optimized. The optimum bias condition has been derived from the overall efficiency analysis of the FFPA with a pre-distortion linearizer. From measured overall performances of the FFPA, efficiency enhancement of the series diode linearizer has been verified. The developed FFPA achieved the efficiency of 10% and output power of 45.6 dBm at 10 MHz offset Adjacent Channel leakage Power Ratio (ACPR) -50 dBc under Wide-band Code-Division Multiple-Access (W-CDMA) modulated 2 carriers signal. This design method can be also used to optimize the source and load impedances condition of the main amplifier FET.
Tomoharu KITABAYASHI Tetsuya SAKAI Akira WADA
In modern high-capacity wavelength division multiplexing (WDM) transmission systems, there is increasing demand for large transmission capacity. To achieve this purpose, an L-band (1565-1625 nm) erbium-doped fiber amplifier (EDFA) is very effective method because the conventional silica-based EDF can be used. In EDFAs that used in WDM transmission systems, the gain flatness of EDFA is very important. A passive gain equalizer flattens the gain profile of EDFA. But the gain flatness in L-band deteriorates due to dynamic gain-tilt (DGT) and temperature gain-tilt (TGT) when the operating condition of the EDFA changes, while the EDFAs should maintain the gain flatness even if the operating condition has changed. To solve this problem, we propose an active gain-slope compensation technique for the L-band EDFA using a thulium-doped fiber (TDF). The EDFA actively gain-slope compensated by the TDF compensator keeps the gain profile constant for the wide input power range of more than 8 dB, a wide temperature range of 65 without gain-tilt in a wavelength band between 1575 nm and 1610 nm. Furthermore, the EDFA keeps a low noise figure of less than 7.5 dB.
Young I. SON Hyungbo SHIM Kyoung-cheol PARK Jin H. SEO
We present a state-space approach to the problem of designing a parallel feedforward compensator (PFC), which has the same dimension of the input i.e. input-dimensional, for a class of non-square linear systems such that the closed-loop system is strictly passive. For a non-minimum phase system or a system with high relative degree, passification of the system cannot be achieved by any other methodologies except by using a PFC. In our scheme, we first determine a squaring gain matrix and an additional dynamics that is connected to the system in a feedforward way, then a static passifying control law is designed. Consequently, the actual feedback controller will be the static control law combined with the feedforward dynamics. Necessary and sufficient conditions for the existence of the PFC are given by the static output feedback formulation, which enables to utilize linear matrix inequality (LMI). Since the proposed PFC is input-dimensional, our design procedure can be viewed as a solution to the low-order dynamic output feedback control problem in the literature. The effectiveness of the proposed method is illustrated by some numerical examples.
Naotake KAMIURA Yasuyuki TANIGUCHI Yutaka HATA Nobuyuki MATSUI
In this paper we propose a learning algorithm to enhance the fault tolerance of feedforward neural networks (NNs for short) by manipulating the gradient of sigmoid activation function of the neuron. We assume stuck-at-0 and stuck-at-1 faults of the connection link. For the output layer, we employ the function with the relatively gentle gradient to enhance its fault tolerance. For enhancing the fault tolerance of hidden layer, we steepen the gradient of function after convergence. The experimental results for a character recognition problem show that our NN is superior in fault tolerance, learning cycles and learning time to other NNs trained with the algorithms employing fault injection, forcible weight limit and the calculation of relevance of each weight to the output error. Besides the gradient manipulation incorporated in our algorithm never spoils the generalization ability.