A new type of analog-to-digital (A/D) converter is introduced. The structure is based on a magnitude-preserving quadrature mirror filter (QMF) bank where the analysis bank is composed on IIR switched-capacitor (SC) filters. The analog output samples of the analysis filters are converted into digital form using individual A/D converters and combined by an IIR digital filter synthesis filter bank. This A/D converter is useful in applications where only the magnitude of the spectrum of the analog signal needs to be preserved. The structure incorporates the advantages of sub-band coding and reduces considerably the effect of mismatches among the sub-band A/D converters. In addition, the proposed scheme leads to an increase in the conversion speed by a factor of M when an M-channel QMF bank is used. An illustrative example verifying the good performance of the proposed approach is included.

An RF IC for a 1.1-V VHF paging receiver is developed. In order to reduce the number of components, it employs direct-conversion frequency shift keying (FSK) architecture. The RF IC adopts two new gain control circuits so as to achieve a wide input dynamic range with only a 1.1 V power supply. One is a low-voltage, low-noise, low-distortion RF amplifier and the other is a low-voltage AGC amplifier. By applying these new circuit technologies, the RF IC achieves a voltage gain of 50.5 dB and a noise figure of 4.3 dB with only 2.0 mW power consumption. Overall, the paging receiver achieves a high sensitivity of -130 dBm and low-intermodulation sensitivity of -37 dBm with bit error rate of 310^-2. This paper describes the new high-frequency low-voltage circuit technologies applied in the RF IC.

This paper describes design considerations for high frequency active BPFs up to 100 MHz. The major design issues for high frequency active filters are the excess phase shift in the integrators and high power consumption of the integrators. Typical bipolar transistor based transconductors such as the Gilbert gain cell and the linearized transconductor with two asymmetric emitter-coupled pairs have been analyzed and compared. It has been clarified that the power consumption of the linearized transconductor can be much smaller than that of the Gilbert gain cell because of its high transconductance to working current ratio while maintaining a signal to noise ratio of the same order. A simple high-speed fully differential linearized transconductor cell is proposed with emitter follower buffers and resistive loads for excess phase compensation. A novel gyrator based transformation for the LC ladder BPF has been introduced. This transformation has resulted in a structure with simple capacitor-coupled active resonators which exactly preserves the original transfer function. A fourth order 10.7 MHz BPF IC was designed using the proposed transconductors. It was fabricated and has demonstrated the usefulness of the proposed approach. In addition, an experimental 100 MHz second order BPF IC with Q=14 has been successfully implemented indicating the potential of the proposed approach.

An integrator is quite a suitable active element for high-speed filters. The effect of its excess phase shifts, however, is severe in the case of high-Q filter realization. The deterioration due to the excess phase shifts cannot be avoided when only integrators are used as frequency-dependent elements like in leapfrog realization. This paper describes a design of second-order high-speed and high-Q filters with low sensitivity to excess phase shifts of integrators by adding a passive RC circuit. The proposed method can drastically reduce the effect due to the undesirable pole of an integrator, which is the cause of the excess phase shifts, compared to conventional filters using only integrators. As an example, a fourth-order bandpass filter with 5-MHz center frequency and Q=25 is implemented by the proposed method on a monolithic chip. The results obtained here show quite good agreement with the theoretical values. This demonstrates effectiveness of the proposed method and feasibility of high-speed and high-Q filters on a monolithic chip.

This paper describes an automatic transistor model parameter generation technique for a circuit simulator which can take device geometry into account. An 'area factor' is used to generate model parameters for different transistor shapes; however, the conventional method could not reflect the actual geometry differences other than for the emitter area. This resulted in inaccurate model parameters and such parameters were not acceptable to accurately simulate circuits for RF ICs. The proposed technique uses actually measured parameters and process data for a reference transistor and generates the individual model parameters for different shape transistors. In this technique, the parasitic resistor values are calculated and fitted in place of directly extracting them from the measured data. This ensures a better estimate. The reference transistor is made sufficiently large to neglect measurement errors in generating the parasitic capacitors. Thus, the model parameters for a very small transistor can be generated accurately. The model generating procedure has been implemented as a pre-processor to SPICE. This technique enables a fast turn around for RF IC circuit design which uses various shape transistors.

A high frequency MOSFET model is presented. This model takes into account the electron mobility reduction due to the normal and parallel fields. By using a frequency power series, an analytic second order expression for the intrinsic admittance parameters is obtained. This intrinsic admittance model is first simplified and then completed by the external elements, measured, or calculated in the case of the high frequency lateral type structure. The proposed model shows that the two-field-dependent mobility effect reduces the unilateral power gain by maximum 2 dB compared to the one-field-dependent mobility and constant mobility models. The proposed model gives a good prediction of the scattering parameters measured from 50 to 200 MHz. The average deviation of the calculated unilateral power gain from the measured values is 1.86 dB.

Power-law decay of current for the application of step-function voltage observed for amorphous materials can be expressed by an admittance s^a(0a1) of a linear diode using complex angular frequency s. It is shown that power-law decay can be interpreted as a superposition of exponential decays having fractally distributed relaxation times and simulated using RC networks. By use of a similar manner, admittance s^-b (0b1) showing the relation of duality can be simulated using RL networks. According to these methods, we can synthesize the admittance involving non-integer exponents systematically.

Complex filters are used to synthesize real filters in digital signal processing, but few in analog one. In this paper, we propose a leapfrog synthesis of complex analog filters. By shifting frequency response of an LCR network along the ω-axis, we have a complex filter with imaginary resistances, which is called an "LCRRⁱ filter." The complex resonator is then used to simulate series- or parallel-arms of the LCRRⁱ filter. We analyze nonideal properties of the complex resonator due to finite gain-bandwidth product of operational amplifiers and propose a compensation method to put a pole on correct location. Experimental results show good performance of the proposed method.

The robust finite settling time stabilization problem is considered for a multivariable discrete time plant with structured uncertainties. Finite settling time (FST) stability of a feedback system is a notion introduced recently for discrete time systems as a generalization of the dead-beat response. The uncertain plant treated in this paper is described by (E₀+Σ^K_i=1q_iE_i)x(t+1)(A₀+Σ^K_i=1q_iA_i)x(t)+(B₀+Σ^K_i=1q_iB_i)u(t), and y(t)=(C₀+Σ^K_i=1q_iC_i)x(t) where E_i, A_i, B_i and C_i (0iK) are prescribed real matrices and q_i (1iK) are uncertain parameters restricted to prescribed intervals [q_i, _i]. It is shown in this paper that a controller robustly FST stabilizes such an uncertain plant, if, the uncertain plant satisfies some conditions, and the controller simultaneously FST stabilizes a finite set of plants. The result leads to a testable necessary and sufficient condition of the existence of a solution to the robust FST stabilization problem, and a systematic method of designing a robust FST stable feedback system, in the case where the plant contains only one uncertain parameter.

In this paper, the effects of the grouping and the addressing methods on the accuracy and the response time in a visual search task were investigated. Four grouping conditions (4, 8, 16 and 32 groups) and four addressing methods (random, ordered, cartesian and polar) were selected in the experiment. For each combination of grouping and addressing methods, subjects repeated the search task 30 times. No remarkable differences of the percent correct were observed both among the levels of grouping and among the addressing methods. The mean response time increased with the increase of the number of groups. Moreover, the interaction between addressing methods and grouping for both percent correct and response time was clarified.

This paper describes a new technique for isolated word recognition that uses both pitch information and spectral information. In conventional methods, words with similar phoneme features tend to be misrecognized even if their phonemes are accented differently because these methods use only spectral information. It is possible to improve recognition accuracy by considering pitch patterns of words. Many phonetically-similar Japanese words are classified by pitch patterns. In this technique, a pitch pattern template is produced by averaging pitch patterns obtained from a set of words which have the same accent pattern. A measure for word recognition is proposed. This measure based on a combination of the phoneme likelihood and the pitch pattern distance which is the distance between a pitch pattern of an input speech and pitch pattern templates. Speaker-dependent word recognition experiments were carried out using 216 Japanese words uttered by five male and five female speakers. The proposed technique reduces the recognition error rate by 40% compared with the conventional method using only phoneme likelihood.

A simple inequality that guarantees stability of perturbed linear state space models is proposed. It is shown that the result is superior to some existing result in sharpness and possesses some advantageous aspects.

This letter describes the concepts that the learnability of multilayer neural networks exists in a constrained hypersurface in learning space which is formed by input and output subspace of multilayer neural networks, and that a priori information, providing constraints on the learning space, is required for generalization.

We apply Fahlman and Lebiere's (FL) algorithm to network synthesis and incremental learning by making use of already-trained networks, each performing a specified task, to design a system that performs a global or extended task without destroying the information gained by the previously trained nets. Investigation shows that the synthesized or expanded FL networks have generalization ability superior to Back propagation (BP) networks in which the number of newly added hidden units must be pre-specified.