Time series prediction is very important technology in a wide variety of fields. The actual time series contains both linear and nonlinear properties. The amplitude of the time series to be predicted is usually continuous value. For these reasons, we combine nonlinear and linear predictors in a cascade form. The nonlinear prediction problem is reduced to a pattern classification. A set of the past samples x(n-1),. . . ,x(n-N) is transformed into the output, which is the prediction of the next coming sample x(n). So, we employ a multi-layer neural network with a sigmoidal hidden layer and a single linear output neuron for the nonlinear prediction. It is called a Nonlinear Sub-Predictor (NSP). The NSP is trained by the supervised learning algorithm using the sample x(n) as a target. However, it is rather difficult to generate the continuous amplitude and to predict linear property. So, we employ a linear predictor after the NSP. An FIR filter is used for this purpose, which is called a Linear Sub-Predictor (LSP). The LSP is trained by the supervised learning algorithm using also x(n) as a target. In order to estimate the minimum size of the proposed predictor, we analyze the nonlinearity of the time series of interest. The prediction is equal to mapping a set of past samples to the next coming sample. The multi-layer neural network is good for this kind of pattern mapping. Still, difficult mappings may exist when several sets of very similar patterns are mapped onto very different samples. The degree of difficulty of the mapping is closely related to the nonlinearity. The necessary number of the past samples used for prediction is determined by this nonlinearity. The difficult mapping requires a large number of the past samples. Computer simulations using the sunspot data and the artificially generated discrete amplitude data have demonstrated the efficiency of the proposed predictor and the nonlinearity analysis.

A training data selection method is proposed for multilayer neural networks (MLNNs). This method selects a small number of the training data, which guarantee both generalization and fast training of the MLNNs applied to pattern classification. The generalization will be satisfied using the data locate close to the boundary of the pattern classes. However, if these data are only used in the training, convergence is slow. This phenomenon is analyzed in this paper. Therefore, in the proposed method, the MLNN is first trained using some number of the data, which are randomly selected (Step 1). The data, for which the output error is relatively large, are selected. Furthermore, they are paired with the nearest data belong to the different class. The newly selected data are further paired with the nearest data. Finally, pairs of the data, which locate close to the boundary, can be found. Using these pairs of the data, the MLNNs are further trained (Step 2). Since, there are some variations to combine Steps 1 and 2, the proposed method can be applied to both off-line and on-line training. The proposed method can reduce the number of the training data, at the same time, can hasten the training. Usefulness is confirmed through computer simulation.

A 1. 5 GHz low noise amplifier (LNA) was designed and fabricated by using CMOS technology. The measured associated gain (G_a) of the LNA is 13. 8 dB, the minimum noise figure (NFmin) is 2. 9 dB and the input-referred third-order intercept point (IIP3) is -2. 5 dBm at 1. 5 GHz. The LNA consumes 8. 6 mA from a 3. 0 V supply voltage. These measured results indicate a potential of short channel MOSFETs for high-frequency and low-noise applications.

This paper describes the design and performance of a high-speed 6-bit ADC using SiGe HBT for measuring-instrument applications. We show that the Gummel-Poon model suffices for SiGe HBT modeling and then we describe that the folding/interpolation architecture as well as simple, differential circuit design are suitable for ADC design with SiGe HBT. Measured results show that the nonlinearity of the ADC is within 1/2 LSB, and the effective bits are 5. 2 bits at an input frequency of 100 MHz and 4. 2 bits at 200 MHz with 768 MS/s. We also describe some design issues for folding/interpolation ADC.

In this paper, we compare the performance of evolutionary digital filters (EDFs) for IIR adaptive digital filters (ADFs) in terms of convergence behavior and stability, and discuss their advantages. The authors have already proposed the EDF which is controlled by adaptive algorithm based on the evolutionary strategies of living things. This adaptive algorithm of the EDF controls and changes the coefficients of inner digital filters using the cloning method or the mating method. Thus, the adaptive algorithm of the EDF is of a non-gradient and multi-point search type. Numerical examples are given to demonstrate the effectiveness and features of the EDF such that (1) they can work as adaptive filters as expected, (2) they can adopt various error functions such as the mean square error, the absolute sum error, and the maximum error functions, and (3) the EDF using IIR filters (IIR-EDF) has a higher convergence rate and smaller adaptation noise than the LMS adaptive digital filter (LMS-ADF) and the adaptive digital filter based on the simple genetic algorithm (SGA-ADF) on a multiple-peak surface.

FIR digital filters composed of parallel multiple subfilters are proposed. A binary expression of an input signal is decomposed into multiple shorter words, which drive the subfilters having different length. The output error is evaluated by mean squared and maximum spectra. A fast algorithm is also proposed to determine optimal filter lengths and coefficients of subfilters. Many examples confirm that the proposed filters generate smaller output errors than conventional filters under the condition of specified number of multiplications and additions in filter operations. Further, multiplier and adder structures (MAS) to perform the operations of the proposed filters are also presented. The number of gates used in the proposed MAS and its critical path are estimated. The effectiveness of the proposed MAS is confirmed.

Digital signal processors (DSPs) usually employ indirect addressing using an address register (AR) to indicate their memory addresses, which often introduces overhead codes in AR updates for next memory accesses. In this paper, AR update scheme is extended such that address can be efficiently modified by 2 in addition to conventional 1 updates. An automatic address allocation method of program variables for this new addressing model is presented. The method formulates program variables and AR modifications by a graph, and extracts a maximum chained triangle graph, which is accessed only by AR 1 and 2 operations, so that the estimated number of overhead codes is minimized. The proposed methods are applied to a DSP compiler, and memory allocations derived for several examples are compared with memory allocations by other methods.

One of the ways to execute a processing algorithm in high speed is parallel processing on multiple computing resources such as processors and functional units. To identify the minimum number of computing resources, the most important is the scheduling to determine when each operation in the processing algorithm is executed. Among feasible schedules satisfying all the data dependencies in the processing algorithm, an overlapped schedule can achieve the fastest execution speed for an iterative processing algorithm. In the case of processing algorithms with operations which are executed on some conditions, computing resources can be shared by those conditional operations. In this paper, we propose a scheduling method which derives an overlapped schedule where the required number of computing resources is minimized by considering the sharing by conditional operations.

An image recognition system using NEURO4, a programmable parallel processor, is described. Optical flow is the velocity field that an observer detects on a two-dimensional image and gives useful information, such as edges, about moving objects. The processing time for detecting optical flow on the NEURO4 system was analyzed. Owing to the parallel computation scheme, the processing time on the NEURO4 system is proportional to the square root of the size of images, while conventional sequential computers need time in proportion to the size. This analysis was verified by experiments using the NEURO4 system. When the size of an image is 84 84, the NEURO4 system can detect optical flow in less than 10 seconds. In this case the NEURO4 system is 23 times faster than a workstation, Sparc Station 20 (SS20). The larger the size of images becomes, the faster the NEURO4 system can detect optical flow than conventional sequential computers like SS20. Furthermore, the paralleling effect increases in proportion to the number of connected NEURO4 chips by a ring expansion scheme. Therefore, the NEURO4 system is useful for developing moving image recognition algorithms which require a large amount of processing time.

In the floorplan design problem, soft blocks can take various rectilinear shapes. The conventional floorplanning methods, however, restrict their shapes only to rectangle. As a result, waste area often remains in the layout. Some floorplanning methods have been developed to handle rectilinear hard blocks, however, no floorplanning methods have been developed to optimize rectilinear soft blocks. In this paper, we propose a floorplanning method which places rectilinear soft blocks. The advantages of the method are reducing both waste area and wire length. We present Separate-Rejoin method which efficiently forms rectilinear shapes for soft blocks. The result is obtained quickly because the method is based on the slicing structure in spite of handling rectilinear block. Thus, our method is suitable for practical use in terms of layout area, wire length and processing time. We applied our method to a benchmark example and an industrial data. For the benchmark example, our method reduces waste area by 25% and wire length by 13% in comparison with the conventional rectangular soft block approach.

In this paper, we propose a transformation technique for the multiplications of one variable with multiple constants, which are frequently seen in the various applications of signal processing, image processing, and so forth. The method is based on the exploration of common subexpressions among constants and reduces the number of shifts, additions, and subtractions to implement linear computations with hardware. Our method searches for regularity among elements of a linear transform using matrix decomposition and generates a reduced data-flow graph which preserves the full regularity. We show experimental results obtained using Discrete Cosine Transform (DCT) and Fast Fourier Transform (FFT) and illustrate the effectiveness of the method.

As MOSFET sizes and wire widths become very small in recent years, influence of resistive component of interconnects on the estimation of propagation delay and power dissipation can no longer be neglected. In this paper we present formulas of output waveform at driving point and short-circuit power dissipation for static CMOS logic gates driving a CRC π load. By representing the short-circuit current and the current flowing in the resistance of a CRC π load by piece-wise linear functions, a closed-form formula is derived. On the gate delay the error of our formula is less than 8% from SPICE in our experiments. These formulas will contribute to faster estimation of circuit speed and power dissipation of VLSI chips on timing level simulators.

The lower-bounded p-collection problem is the problem where to locate p sinks in a flow network with lower bounds such that the value of a maximum flow is maximum. This paper discusses the cover problems corresponding to the lower bounded p-collection problem. We consider the complexity of the cover problem, and we show polynomial time algorithms for its subproblems in a network with tree structure.

In this paper, we study bifurcations of equilibrium points and periodic solutions observed in a resistively coupled oscillator with voltage ports. We classify equilibrium points and periodic solutions into four and eight different types, respectively, according to their symmetrical properties. By calculating D-type of branching sets (symmetry-breaking bifurcations) of equilibrium points and periodic solutions, we show that all types of equilibrium points and periodic solutions are systematically found. Possible oscillations in two coupled oscillators are presented by calculating Hopf bifurcation sets of equilibrium points. A parameter region in which chaotic oscillations exist is also shown by obtaining a cascade of period-doubling bifurcation sets.

We show that under some conditions an attacker can break the public-key cryptosystem proposed by J. Schwenk and J. Eisfeld at Eurocrypt '96 which is based on the difficulty of factoring over the ring Z/nZ [x], even though its security is as intractable as the difficulty of factoring a rational integer. We apply attacks previously reported against RSA-type cryptosystems with a low exponent to the Schwenk-Eisfeld cryptosystem and show a method of breaking the Schwenk-Eisfeld signature with a low exponent.

Noise cancelation and system identification have been studied for many years, and adaptive filters have proved to be a good means for solving such problems. Some neural networks can be treated as nonlinear adaptive filters, and are thus expected to be more powerful than traditional adaptive filters when dealing with nonlinear system problems. In this paper, two new heterogeneous recurrent neural network (HRNN) architectures will be proposed to identify some nonlinear systems and to extract a fetal electrocardiogram (ECG), which is corrupted by a much larger noise signal, Mother's ECG. The main difference between a heterogeneous recurrent neural network (HRNN) and a recurrent neural network (RNN) is that a complete neural network is used for the feedback path along with an error back-propagation (BP) neural network as the feedforward one. Different feedback neural networks can be used to provide different feedback capabilities. In this paper, a BP neural network is used as the feedback network in the architecture we proposed. And a self-organizing feature mapping (SOFM) network is used next as an alternative feedback network to form another heterogeneous recurrent neural network (HRNN). The heterogeneous recurrent neural networks (HRNN) successfully solve these two problems and prove their superiority to traditional adaptive filters and BP neural networks.

Penumbral imaging is a technique which uses the facts that spatial information can be recovered from the shadow or penumbra that an unknown source casts through a simple large circular aperture. The technique is based on a linear deconvolution. In this paper, a two-step method is proposed for decoding penumbral images. First a local-statistic filter based on adaptive windowing is applied to smooth the noise; then, followed by the conventional linear deconvolution. The simulation results show that the reconstructed image is dramatically improved in comparison to that without the noise-smoothing filtering, and the proposed method is also applied to real experimental X-ray imaging.

This paper investigates some Z₄ codes formed as the Z₄-analog (Hensel lifting) of the binary BCH construction. Such codes with length 105 and dimension 13 have been constructed. They are described with their parameters. Some examples of their generator polynomials are given when Hamming weight and Lee weight are different.

The structure of bidirectional syndrome decoding for binary rate (n-1)/n convolutional codes is investigated. It is shown that for backward decoding based on the trellis of a syndrome former H^T, the syndrome sequence must be generated in time-reversed order using an extra syndrome former H^*T, where H^* is a generator matrix of the reciprocal dual code of the original code. It is also shown that if the syndrome bits are generated once and only once using H^T and H^*T, then the corresponding two error sequences have the intersection of n error symbols, where is the memory length of H^T.

A new learning method is proposed to enhance the performances of the fuzzy ARTMAP neural network in the noisy environment. It combines the average learning and slow learning for the weight vectors in the fuzzy ARTMAP. It effectively reduces a category proliferation problem and enhances recognition performance for noisy input patterns.